Technical Library | 2017-09-14 01:21:52.0
The electronics industry is experiencing a renaissance in semiconductor package technology. A growing number of innovative 3D package assembly methodologies have evolved to enable the electronics industry to maximize their products functionality. By integrating multiple die elements within a single package outline, product boards can be made significantly smaller than their forerunners and the shorter interconnect resulting from this effort has contributed to improving both electrical performance and functional capability. (...) This paper outlines both positive and negative aspects of current 3D package innovations and addresses the challenges facing adopters of silicon and glass based interposer fabrication. The material presented will also reference 3D packaging standards and recognize innovative technologies from a number of industry sources, roadmaps and market forecasts.
Technical Library | 2017-11-01 17:06:38.0
Over fifteen years has passed since North America and Europe ceased being the center of worldwide PCB fabrication, and were supplanted by a Far East market with low cost labor, more relaxed environmental requirements, and strong government support. In just a few short years, the superior cost advantages of this new dynamic put volume PCB production in the West out of business, aside for the military and specialty technology applications contained in the few shops that continue to exist today.Recently, however, the conditions which created the current equilibrium appear to be shifting again. In this new dynamic, automation, innovative green wastewater technologies, and next generation process equipment innovations have combined to make new factories capable of achieving rapid ROI for PCB fabrication almost anywhere. This paper means to illustrate this new dynamic, and provide case study examples from the new greenfield installation at the company captive facility in New Hampshire.
Technical Library | 2020-04-08 22:57:04.0
Flexible hybrid electronics (FHE), designed in wearable and implantable configurations, have enormous applications in advanced healthcare, rapid disease diagnostics, and persistent human-machine interfaces. Soft, contoured geometries and time-dynamic deformation of the targeted tissues require high flexibility and stretchability of the integrated bioelectronics. Recent progress in developing and engineering soft materials has provided a unique opportunity to design various types of mechanically compliant and deformable systems. Here, we summarize the required properties of soft materials and their characteristics for configuring sensing and substrate components in wearable and implantable devices and systems. Details of functionality and sensitivity of the recently developed FHE are discussed with the application areas in medicine, healthcare, and machine interactions. This review concludes with a discussion on limitations of current materials, key requirements for next generation materials, and new application areas.
Technical Library | 2021-05-06 13:41:55.0
Quality control is of vital importance during electronics production. As the methods of producing electronic circuits improve, there is an increasing chance of solder defects during assembling the printed circuit board (PCB). Many technologies have been incorporated for inspecting failed soldering, such as X-ray imaging, optical imaging, and thermal imaging. With some advanced algorithms, the new technologies are expected to control the production quality based on the digital images. However, current algorithms sometimes are not accurate enough to meet the quality control. Specialists are needed to do a follow-up checking. For automated X-ray inspection, joint of interest on the X-ray image is located by region of interest (ROI) and inspected by some algorithms. Some incorrect ROIs deteriorate the inspection algorithm.
Technical Library | 2021-05-06 13:45:49.0
The high-sensitive micro eddy-current testing (ECT) probe composed of planar meander coil as an exciter and spin-valve giant magneto-resistance (SV-GMR) sensor as a magnetic sensor for bare printed circuit board (PCB) inspection is proposed in this paper. The high-sensitive micro ECT probe detects the magnetic field distribution on the bare PCB and the image processing technique analyzes output signal achieved from the ECT probe to exhibit and to identify the defects occurred on the PCB conductor. The inspection results of the bare PCB model show that the proposed ECT probe with the image processing technique can be applied to bare PCB inspection. Furthermore, the signal variations are investigated to prove the possibility of applying the proposed ECT probe to inspect the high-density PCB that PCB conductor width and gap are less than 100 μm.
Technical Library | 2021-05-26 00:53:26.0
This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, build-up technology incorporating microvias has emerged as a viable multilayer printed circuit manufacturing technology. Increased wiring density, reduced line widths, smaller through-holes and microvias are all attributes of these High Density Interconnect (HDI) packages. Filling the microvias with conductive material allows the use of stacked vias and via in pad designs thereby facilitating additional packaging density. Other potential design attributes include thermal management enhancement and benefits for high frequency circuitry. Electrodeposited copper can be utilized for filling microvias and provides potential advantages over alternative via plugging techniques. The features, development, scale up and results of direct current (DC) and periodic pulse reverse (PPR) acid copper via filling processes, including chemistry and equipment, are described.
Technical Library | 2021-12-16 01:48:41.0
Package-on-Package (PoP) technology is widely used in mobile devices due to its simple design, lower cost and faster time to market. Warpage characteristic and requirement of PoP package becomes critical to ensure both the top and bottom package can be mounted with minimal yield lost. With this challenge in placed, iNEMI has been working relentlessly to fingerprint the current PoP package technology warpage characteristic and to establish some key learning for packaging technologies. The work also extended to understand the basic requirement needed for successful PoP stacking by analyzing the warpage data obtained and formulate a simple analytical equation to explain the true warpage requirement for PoP packaging.
Technical Library | 2017-07-13 16:16:27.0
Controlled humidity and temperature controlled surface insulation resistance (SIR) measurements of flux covered test vehicles, subject to a direct current (D.C.) bias voltage are recognized by a number of global standards organizations as the preferred method to determine if no clean solder paste and wave soldering flux residues are suitable for reliable electronic assemblies. The IPC, Japanese Industry Standard (JIS), Deutsches Institut fur Normung (DIN) and International Electrical Commission (IEC) all have industry reviewed standards using similar variations of this measurement. (...) This study will compare the results from testing two solder pastes using the IPC-J-STD-004B, IPC TM-650 2.6.3.7 surface insulation resistance test, and IPC TM-650 2.3.25 in an attempt to investigate the correlation of ROSE methods as predictors of electronic assembly electrical reliability.
Technical Library | 2021-07-27 14:54:26.0
Fast forward to current time. Today, our society embraces cleanliness. We expect, demand, and evaluate cleanliness in almost every aspect of our lives. We wash our cars and pets. We maintain high cleanliness standards in our hotels and public spaces. We require cleanliness in our restaurants and hospitals. We sanitize our hands throughout the day to prevent illness. We live in a clean-centric culture. While we drive clean cars, stay in clean hotels and eat clean food, there is one part of our life where we actually abandoned cleanliness. Many of the circuit assemblies that affect almost every aspect of our daily lives are no longer required to be clean. Even though our life experience confirms the link between cleanliness and reliability, happiness, health, and safety, circuit assemblies no longer maintain that "cleanliness is next to Godliness" status. This was not always the case. There was a time when virtually all circuit assemblies were cleaned. The removal of flux and other process-related contamination was commonplace. Cleaning was as normal as soldering. As we bring history into current time, one may relate the fall of Rome and its adoption of personal hygiene and the subsequent decline in human health to the large-scale abandonment of cleanliness expectations of circuit assemblies and the subsequent reliability issues it has created. How did this happen? Has history repeated itself?
Technical Library | 2019-08-07 22:56:45.0
The requirement to reconsider traditional soldering methods is becoming more relevant as the demand for bottom terminated components (QFN/BTC) increases. Thermal pads under said components are designed to enhance the thermal and electrical performance of the component and ultimately allow the component to run more efficiently. Additionally, low voiding is important in decreasing the current path of the circuit to maximize high speed and RF performances. The demand to develop smaller, more reliable, packages has seen voiding requirements decrease below 15 percent and in some instances, below 10 percent.Earlier work has demonstrated the use of micro-fluxed solder preforms as a mechanism to reduce voiding. The current work builds upon these results to focus on developing an engineered approach to void reduction in leadless components (QFN) through increasing understanding of how processing parameters and a use of custom designed micro-fluxed preforms interact. Leveraging the use of a micro-fluxed solder preform in conjunction with low voiding solder paste, stencil design, and application knowhow are critical factors in determining voiding in QFN packages. The study presented seeks to understand the vectors that can contribute to voiding such as PCB pad finish, reflow profile, reflow atmosphere, via configuration, and ultimately solder design.A collaboration between three companies consisting of solder materials supplier, a power semiconductor supplier, and an electronic assembly manufacturer worked together for an in-depth study into the effectiveness of solder preforms at reducing voiding under some of the most prevalent bottom terminated components packages. The effects of factors such as thermal pad size, finish on PCB, preform types, stencil design, reflow profile and atmosphere, have been evaluated using lead-free SAC305 low voiding solder paste and micro-fluxed preforms. Design and manufacturing rules developed from this work will be discussed.
