Technical Library | 2009-07-22 18:33:41.0
This paper deals with the thermal effects of joule heating in a high interconnect density, thin core, buildup, organic flip chip substrate. The 440 μm thick substrate consists of a 135 μm thick core with via density of about 200 μm. The typical feature sizes in the substrate are 50 micron diameter vias is the core/buildup layers and 12 micron thick metal planes. An experimental test vehicle is powered with current and the temperature rise was measured. A numerical model was used to simulate the temperature rise in the TV.
Technical Library | 2009-01-01 16:37:38.0
Recent technology advancement has enabled enhancement in PWB electrical performance and wiring density. These innovations have taken the form of improved materials, novel PWB interconnect structures, and manufacturing technology. One such advancement is Z-axis conductive interconnect. The Z-interconnect technology involves building mini-substrates of 2 or 3 layers each, then assembling several mini-substrates together using conductive paste.
| 1 |
