Technical Library: dek calibration stencil (Page 1 of 1)

A New Stencil Rulebook for Wafer Level Solder Ball Placement using High Accuracy Screen Printing

Technical Library | 2007-12-13 17:03:02.0

Printer-hosted processes for solder ball placement are now widely used for package technologies ranging from BGAs using ball diameters above 750μm to the latest WL-CSPs demanding 250μm diameter. This broadening spectrum of applications brings more choices in terms of stencil design rules and production methodologies.

ASM Assembly Systems (DEK)

NanoClear Coated Stencils

Technical Library | 2023-05-22 16:49:42.0

Our customers' issues • Apertures are getting smaller • Paste does not release as well • Contaminates the bottom of the stencil • Increases defects / reduces yield  Insufficient solder  Bridging  Solder balls on surface of PCB  Flux residue • Requires more frequent cleaning • Reduced efficiency (wasted time) • Increased use of consumables (cost)  USC fabric (use "cheap" fabric to reduce cost)  Lint creates more defects  Cleaning chemistries (use IPA to reduce cost)  IPA breaks down flux and can create more defects

ASM Assembly Systems (DEK)

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