Technical Library | 2020-12-29 20:55:46.0
Voiding in solder joints has been studied extensively, and the effects of many variables compared and contrasted with respect to voiding performance. Solder paste flux, solder powder size, stencil design, circuit board design, via-in-pad design, surface finish, component size, reflow profile, vacuum reflow, nitrogen reflow and other parameters have been varied and voiding quantified for each. The results show some differences in voiding performance with respect to most of these variables but these variables are not independent of each other. Voiding in solder joints is a complex issue that often requires multiple approaches to reduce voiding below required limits. This paper focuses on solutions to voiding for commonly used bottom terminated components (BTCs).
Technical Library | 2021-07-27 14:59:56.0
With increasing focus on reliability and miniaturized designs, Conductive Anodic Filament (CAF) as failure mechanism is gaining a lot of attention. Smaller geometries make the printed circuit board (PCB) susceptible to conductive anodic filament growth. Isola has carried out work to characterize the CAF susceptibility of various resin systems under different process and design conditions. Tests were carried out to determine the effect of various factors such as resin systems, glass finishes, voltage bias and hole and line spacings on the CAF resistance. This work was intended to provide information to the user on the suitability of various grades for specific end use applications. The focus of the work at Isola is to find the right combination of process and design conditions for improved CAF resistant products.
Technical Library | 2023-11-14 19:52:11.0
The continuous drive in the Electronics industry to build new and innovative products has caused competitive design companies to develop assemblies with consolidated PCB designs, decreased physical sizes, and increased performance characteristics. As a result of these new designs, manufacturers of electronics are forced to contend with many challenges. One of the most significant challenges being the processing of thru-hole components on high thermal mass PCBs having the potential to exceed 20 layers in thicknesses and have copper mass contents of over 40oz. High thermal mass PCBs, coupled with the use of mixed technologies, decreased component spacing, and the change from Tin Lead Solder to Lead Free Alloys has lead many manufacturing facilities to purchase advanced soldering equipment to process challenging assemblies with a high degree of repeatability.
Technical Library | 2024-04-22 20:16:01.0
The solid-state electronics industry faces relentless pressure to improve performance, increase functionality, decrease costs, and reduce design and development time. As a result, device feature sizes are now in the nanometer scale range and design life cycles have decreased to fewer than five years. Until recently, semiconductor device lifetimes could be measured in decades, which was essentially infinite with respect to their required service lives. It was, therefore, not critical to quantify the device lifetimes exactly, or even to understand them completely. For avionics, medical, military, and even telecommunications applications, it was reasonable to assume that all devices would have constant and relatively low failure rates throughout the life of the system; this assumption was built into the design, as well as reliability and safety analysis processes.
Technical Library | 2015-12-17 17:24:17.0
Product quality can be improved through proper application of design for test (DFT) strategies. With today's shrinking product sizes and increasing functionality, it is difficult to get good test coverage of loaded printed circuit boards due to the loss of test access. Advances in test techniques, such as boundary scan, help to recover this loss of test coverage. However, many of these test techniques need to be designed into the product to be effective.This paper will discuss how to maximize the benefits of boundary scan test, including specific examples of how designers should select the right component, connect multiple boundary scan components in chains, add test access to the boundary scan TAP ports, etc. A discussion of DFT guidelines for PCB layout designers is also included. Finally, this paper will include a description of some advanced test methods used in in-circuit tests, such as vectorless test and special probing methods, which are implemented to improve test coverage on printed circuit boards with limited test access.
Technical Library | 1999-05-06 14:48:20.0
This paper describes manufacturing operations design and analysis at Intel. The complexities and forces of both the market and the manufacturing process combine to make the development of improved semiconductor fabrication manufacturing strategies (like lot dispatching, micro and macro scheduling policies, labor utilization, layout, etc.) particularly important...
Technical Library | 2010-12-09 20:26:15.0
As demands accelerate for increasing density, higher bandwidths, and lower power, many IC design teams are looking up – to 3D ICs with through-silicon vias (TSVs). 3D ICs promise “more than Moore” integration by packing a great deal of functionality int
Technical Library | 2012-04-19 21:50:46.0
Presented at IPC Apex 2012. Working through the New Product Introduction (NPI) flow between product design and manufacturing is usually a challenging process, with both parties being experts in their own fields and inextricably linked in the flow of g
Technical Library | 2010-02-25 17:30:32.0
This paper will focus on two challenges: building differentiated products, which can enable systems companies to quickly penetrate a market, take a leadership position, and effectively counter or displace any competition; and build them faster. Clear differentiation also allows a superior value proposition, which will enable a stronger position on pricing with less need to circum to eroding ASPs. Differentiation can involve many factors, but this paper will focus on those related to the technology impact/usage that directly enables the design of products with shorter, more predictable design cycles compared to the competition.
Technical Library | 2019-04-24 20:06:51.0
Choosing an outsourced manufacturing partner that is perfect for a new product and close to your design team is quite different to choosing a partner that can manufacture that same product in volume in lower cost locations and fulfill globally. This is where the Gateway model comes into its own. Most large EMS have structured their organizations to leverage proximity to OEM design teams in high cost regions while providing the benefits of low cost regions for volume manufacturing. The "Gateway" facility in higher cost regions provides design engineering, supply chain design, prototype, and NPI services. The goal of the Gateway is to develop an effective build recipe that can then be effectively and seamlessly transferred to one or more volume manufacturing facility that offers lower costs and direct fulfillment to consumers.We will present a case study that highlights the value of this model and that shows some of the key elements that allow for seamless transitions from plant to plant. The Gateway model is an essential element to a successful global manufacturing model and helps ensure that products are made in the right geography.