Technical Library | 2018-01-04 11:05:34.0
Traceability has grown from being a specialized need for certain safety critical segments of the industry, to now being a recognized value-add tool for the industry as a whole. The perception of traceability data collection however persists as being a burden that may provide value only when the most rare and disastrous of events take place. Disparate standards have evolved in the industry, mainly dictated by large OEM companies in the market create confusion, as a multitude of requirements and definitions proliferate. The intent of the IPC-1782 project is to bring the whole principle and perception of traceability up to date. Traceability, as defined in this standard will represent the most effective quality tool available, becoming an intrinsic part of best practice operations, with the encouragement of automated data collection from existing manufacturing systems, integrating quality, reliability, predictive (routine, preventative, and corrective) maintenance, throughput, manufacturing, engineering and supply-chain data, reducing cost of ownership as well as ensuring timeliness and accuracy all the way from a finished product back through to the initial materials and granular attributes about the processes along the way.
Technical Library | 2019-08-14 22:20:55.0
Cleanliness is a product of design, including component density, standoff height and the cleaning equipment’s ability to deliver the cleaning agent to the source of residue. The presence of manufacturing process soil, such as flux residue, incompletely activated flux, incompletely cured solder masks, debris from handling and processing fixtures, and incomplete removal of cleaning fluids can hinder the functional lifetime of the product. Contaminates trapped under a component are more problematic to failure. Advanced test methods are needed to obtain "objective evidence" for removing flux residues under leadless components.Cleaning process performance is a function of cleaning capacity and defined cleanliness. Cleaning performance can be influenced by the PCB design, cleaning material, cleaning machine, reflow conditions and a wide range of process parameters.This research project is designed to study visual flux residues trapped under the bottom termination of leadless components. This paper will research a non-destructive visual method that can be used to study the cleanability of solder pastes, cleaning material effectiveness for the soil, cleaning machine effectiveness and process parameters needed to render a clean part.
Technical Library | 2019-10-10 00:26:28.0
Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."
Technical Library | 2019-10-17 08:44:01.0
There has been an increase in sealing and encapsulation applications mainly in the field of autonomous driving. Safety and assistance systems already make driving safer and more comfortable today. With increasing progress even more electronic systems will be added. The smooth functioning of computers, sensors, cameras, etc. - and thus our safety as road users - also depends on optimally applied potting media. These can be applied economically, quickly and with high quality in individual applications and are now mastered. With the changing mobility concepts, however, the prerequisites in manufacturing are changing. The requirements are often not fixed at the outset, but only develop during the course of the project. The aim here is to generate a flexible standard that enables attractive pricing and short delivery times. However, we are prepared for these developments: with our modular system consisting of scalable system modules. From this, individual processes can be taken and combined according to requirements. Our new LiquiPrep systems have recently become part of this modular system. They represent a further development of the proven A310 product family and enable reliable processing and conveying of self-levelling media. In addition to a significantly more intuitive operation, the LiquiPrep systems also offer higher performance thanks to a new, patented membrane pump and an optimized agitator. Image: Optimally applied sealants and casting materials form the basis for high quality and smooth functioning of the components.
Technical Library | 2020-11-04 17:57:41.0
Residues present on circuit boards can cause leakage currents if not controlled and monitored. How "Clean is Clean" is neither easy nor cheap to determine. Most OEMs use analytical methods to assess the risk of harmful residues. The levels that can be associated with clean or dirty are typically determined based on the exposed environment where the part will be deployed. What is acceptably clean for one segment of the industry may be unacceptable for more demanding segments. As circuit assemblies increase in density, understanding cleanliness data becomes more challenging. The risk of premature failure or improper function is typically site specific. The problem is that most do not know how to measure or define cleanliness nor can they recognize process problems related to residues. A new site specific method has been designed to run performance qualifications on boards built with specific soldering materials, reflow settings and cleaning methods. High impedance measurements are performed on break off coupons designed with components geometries used to build the assembly. The test method provides a gauge of potential contamination sources coming from the assembly process that can contribute to electrochemical migration.
Technical Library | 2021-05-13 16:03:25.0
Sn-based lead-free solders such as Sn-Ag-Cu, Sn-Cu, and Sn-Bi have been used extensively for a long time in the electronic packaging field. Recently, low-temperature Sn-Bi solder alloys attract much attention from industries for flexible printed circuit board (FPCB) applications. Low melting temperatures of Sn-Bi solders avoid warpage wherein printed circuit board and electronic parts deform or deviate from the initial state due to their thermal mismatch during soldering. However, the addition of alloying elements and nanoparticles Sn-Bi solders improves the melting temperature, wettability, microstructure, and mechanical properties. Improving the brittleness of the eutecticSn-58wt%Bi solder alloy by grain refinement of the Bi-phase becomes a hot topic. In this paper, literature studies about melting temperature, microstructure, inter-metallic thickness, and mechanical properties of Sn-Bi solder alloys upon alloying and nanoparticle addition are reviewed
Technical Library | 2021-05-20 13:55:14.0
Quality Control is essential in production processes. In the PCB Assembly process there are several Quality Control steps or options. The most popular tests are the electrical (In-Circuit or ICT) and the function (functional or FCT/FVT) test. ICT test fixtures are standardized and there are several major test platforms available which are industry standards. For FCT applications there are many more variations possible due to the vast number of testers and interface approaches unique to each customer; also due to an endless list of applications which fall under the category of Functional Test (RF, High Current, LED test, Leak test etc.) Test Probes are a very important part in ICT as well as in FCT applications. If the wrong test probe (type, spring force, tip style etc.) is used, the test fixture will not work as intended. In addition the test probe must be installed correctly in order to work properly. This presentation will show general information and some guidelines for a proper Test Fixture design to assure the most efficient production.
Technical Library | 2022-10-11 20:29:31.0
Electronic assemblies deployed in harsh environments may be subjected to multiple thermal environments during the use-life of the equipment. Often the equipment may not have any macro-indicators of damage such as cracks or delamination. Quantiication of thermal environments during use-life is often not feasible because of the data-capture and storage requirements, and the overhead on core-system functionality. There is need for tools and techniques to quantify damage in deployed systems in absence of macro-indicators of damage without knowledge of prior stress history. The presented PHM framework is targeted towards high reliability applications such as avionic and space systems. In this paper, Sn3.0Ag0.5Cu alloy packages have been subjected to multiple thermal cycling environments including -55 to 125C and 0 to 100C. Assemblies investigated include area-array packages soldered on FR4 printed circuit cards. The methodology involves the use of condition monitoring devices, for gathering data on damage pre-cursors at periodic intervals. Damage-state interrogation technique has been developed based on the Levenberg-Marquardt Algorithm in conjunction with the microstructural damage evolution proxies. The presented technique is applicable to electronic assemblies which have been deployed on one thermal environment, then withdrawn from service and targeted for redeployment in a different thermal environment. Test cases have been presented to demonstrate the viability of the technique for assessment of prior damage, operational readiness and residual life for assemblies exposed to multiple thermo-mechanical environments. Prognosticated prior damage and the residual life show good correlation with experimental data, demonstrating the validity of the presented technique for multiple thermo-mechanical environments.
Technical Library | 2020-07-08 20:05:59.0
There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.
Technical Library | 2019-07-02 23:02:05.0
The introduction of lead-free solders resulted in a selection of different chemistries for solder pastes. The higher melting points of lead-free alloys required thermal heat resistant rosin systems and activators that are active at elevated temperatures. As a result, more frequent maintenance of the filtration systems is required and machine downtime is increased.Last year a different method of cleaning reflow ovens was introduced. Instead of cooling down the process gasses to condensate the residues, a catalyst was used to maintain the clean oven. Catalytic thermal oxidation of residues in the nitrogen atmosphere resulted in cleaner heating zones. The residues were transformed into carbon dioxide. This remaining small amount of char was collected in the catalyst. In air ovens the catalyst was not seen as a beneficial option because the air extracted out of the oven was immediately exhausted into the environment. When a catalyst is used in an air environment there is not only the carbon dioxide residues, but also water. When a catalyst is used in an air reflow oven the question is where the water is going to. Will it condensate in the process part of the oven or is the gas temperature high enough to keep it out of the process area? A major benefit of using a catalyst to clean the air before it is exhausted into the environment is that the air pollution is reduced dramatically. This will make environmental engineers happy and result in less pollution of our nature. Apart from this, the exhaust tubes remain clean which reduces the maintenance of air ovens.This paper will give more detailed information of catalyst systems during development and performance in production lines.
