Technical Library | 2023-01-17 17:27:13.0
Reflow profile has significant impact on solder joint performance because it influences wetting and microstructure of the solder joint. The degree of wetting, the microstructure (in particular the intermetallic layer), and the inherent strength of the solder all factor into the reliability of the solder joint. This paper presents experimental results on the effect of reflow profile on both 63%Sn 37%Pb (SnPb) and 96.5%Sn 3.0%Ag 0.5%Cu (SAC 305) solder joint shear force. Specifically, the effect of the reflow peak temperature and time above solder liquidus temperature are studied. Nine reflow profiles for SAC 305 and nine reflow profiles for SnPb have been developed with three levels of peak temperature (230 o C, 240 o C, and 250 o C for SAC 305; and 195 o C, 205 o C, and 215 o C for SnPb) and three levels of time above solder liquidus temperature (30 sec., 60 sec., and 90 sec.). The shear force data of four different sizes of chip resistors (1206, 0805, 0603, and 0402) are compared across the different profiles. The shear force of the resistors is measured at time 0 (right after assembly). The fracture surfaces have been studied using a scanning electron microscopy (SEM) with energy dispersive spectroscopy (EDS)
Technical Library | 2017-12-07 10:35:50.0
Electronics manufacturers protect their circuit boards with conformal coatings. Conformal coatings serve as a barrier from environmental hazards and internal shorts, tin whiskers, and corrosion at the board level. Within conformal coatings different material chemistries specialize in shielding from an array of hazards and can be applied by multiple methods. The most common method is atomized spray which disperses the material into a fine mist. Alternatively, non-atomized coating controls the materials' dispense shape while maintaining the original liquid form. While some applications demand atomized spray and other scenarios overlap between atomized and non-atomized coating, this paper focuses on the circumstances where materials are ideally suited for non-atomized, selective coating.
Technical Library | 2015-11-05 15:09:27.0
There has been recent activity and interest in Laser-Cut Electroform blank foils as an alternative to normal Electroform stencils. The present study will investigate and compare the print performance in terms of % paste transfer as well the dispersion in paste transfer volume for a variety of Electroform and Laser-Cut stencils with and without post processing treatments. Side wall quality will also be investigated in detail. A Jabil solder paste qualification test board will be used as the PCB test vehicle.
Technical Library | 2016-03-03 17:25:26.0
This paper discusses a nano copper based paste for use in via filling. The company manufactures nano copper and disperses the coated nano copper into a paste in combination with micron copper. The resultant paste is injected or fills a via. The via is subsequently sintered by means of photonic sintering, or by heat in a reducing environment. The process will be accomplished in under an hour and results in filled solid copper vias.
Technical Library | 2013-08-22 14:28:58.0
Tin-rich solders are widely applied in the electronic industry in the majority of modern printed circuit boards (PCBs). Because the use of lead-tin solders has been banned in the European Union since 2006, the problem of the bridging of adjacent conductors due to tin whisker growth (limited before by the addition of Pb) has been reborn. In this study tin alloys soldered on glass-epoxy laminate (typically used for PCBs) are considered. Scanning ion microscopy with Focused Ion Beam (FIB) system and energy-dispersive X-ray spectroscopy (EDXS) were used to determine correlations between spatial non-uniformities of the glass-epoxy laminate, the distribution of intermetallic compounds and whisker growth.
Technical Library | 2021-09-21 20:36:45.0
The present paper gives an overview of surface failures, internal nonconformities and solders joint failures detected by microscopic analysis of electronic assemblies. Optical microscopy (stereomicroscopy) and Fourier-Transform- Infrared (FTIR) microscopy is used for documentation and failure localization on electronic samples surface. For internal observable conditions a metallographic cross-section analysis of the sample is required. The aim of this work is to present some internal and external observable nonconformities which frequently appear in electronic assemblies. In order to detect these nonconformities, optical microscopy, cross section analysis, FTIR-microscopy and scanning electron microscopy with energy dispersive spectrometry (SEM-EDS) were used as analytical techniques.
Technical Library | 2018-04-18 23:55:01.0
Higher functionality, higher performance and higher reliability with smaller real estate are the mantras of any electronic device and the future guarantees more of the same. In order to achieve the requirements of these devices, designs must incorporate fine line and via pitch while maintain good circuitry adhesion at a smooth plating-resin interface to improve signal integrity. The Semi-Additive Process (SAP) is a production-proven method used on low dielectric loss tangent (Df) build-up materials that enables the manufacture of ultra-fine circuitry. (...) This paper will discuss a new SAP process for low loss build-up materials with low desmear roughness (Ra= 40-100 nm) and excellent adhesion (610-680 gf/cm) at various processing conditions. Along with the process flow, the current work will also present results and a discussion regarding characterization on the morphology and composition of resin and/or metal plating surfaces using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX), surface roughness analysis, plating-resin adhesion evaluation from 90o peel tests
Technical Library | 2021-07-13 19:59:34.0
We have investigated the processing of lead-zirconate-titanate-based thick films by inkjet printing Pb (Zr0.53Ti0.47)0.98Nb0.02O3 with a 6 mol% excess of PbO nanosized powder dispersed in water. Differentwaveforms were employed to determine the optimum size and shape of the drops. A uniform, defect-free pattern with dimensions of 4 mm × 4 mm can be printed using 20 V and a drop spacing of 20 μm. The inkjet-printed films were heated to 400 °C to remove the organics and subsequently sintered at 750 and 850 °C. The correlations between the density, grain size and electromechanical properties of the thick films and bulk ceramics are qualitatively discussed. A thickness coupling factor of 46% was obtained for a 15-μm-thick film sintered at low temperature of 850 °C, which is comparable to the value of the bulk ceramic with an identical nominal chemical composition. Our results are important for the economic and environmental-benign printing of piezoelectric materials applicable in variety of electronic devices, such as sensors, actuators, transformers, piezoelectric energy harvesters and transducers.
Technical Library | 2021-10-20 18:21:06.0
The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.
Technical Library | 2021-11-03 17:05:39.0
Additively printed circuits provide advantages in reduced waste, rapid prototyping, and versatile flexible substrate choices relative to conventional circuit printing. Copper (Cu) based inks along with intense pulsed light (IPL) sintering can be used in additive circuit printing. However, IPL sintered Cu typically suffer from poor solderability due to high roughness and porosity. To address this, hybrid Cu ink which consists of Cu precursor/nanoparticle was formulated to seed Cu species and fill voids in the sintered structure. Nickel (Ni) electroplating was utilized to further improve surface solderability. Simulations were performed at various electroplating conditions and Cu cathode surface roughness using the multi-physics finite element method. By utilizing a mask during IPL sintering, conductivity was induced in exposed regions; this was utilized to achieve selective Ni-electroplating. Surface morphology and cross section analysis of the electrodes were observed through scanning electron microscopy and a 3D optical profilometer. Energy dispersive X-ray spectroscopy analysis was conducted to investigate changes in surface compositions. ASTM D3359 adhesion testing was performed to examine the adhesion between the electrode and substrate. Solder-electrode shear tests were investigated with a tensile tester to observe the shear strength between solder and electrodes. By utilizing Cu precursors and novel multifaceted approach of IPL sintering, a robust and solderable Ni electroplated conductive Cu printed electrode was achieved.
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