Technical Library | 2012-12-17 22:05:22.0
Package on Package (PoP) has become a relatively common component being used in mobile electronics as it allows for saving space in the board layout due to the 3D package layout. To insure device reliability through drop tests and thermal cycling as well as for protecting proprietary programming of the device either one or both interconnect layers are typically underfilled. When underfill is applied to a PoP, or any component for that matter, there is a requirement that the board layout is such that there is room for an underfill reservoir so that the underfill material does not come in contact with surrounding components. The preferred method to dispensing the underfill material is through a jetting process that minimizes the wet out area of the fluid reservoir compared to traditional needle dispensing. To further minimize the wet out area multiple passes are used so that the material required to underfill the component is not dispensed at once requiring a greater wet out area. Dispensing the underfill material in multiple passes is an effective way to reduce the wet out area and decrease the distance that surrounding components can be placed, however, this comes with a process compromise of additional processing time in the underfill dispenser. The purpose of this paper is to provide insight to the inverse relationship that exists between the wet out area of the underfill reservoir and the production time for the underfill process.
Technical Library | 2016-04-21 14:10:55.0
The world of electronics continues to increase functional densities on products. One of the ways to increase density of a product is to utilize more of the 3 dimensional spaces available. Traditional printed circuit boards utilize the x/y plane and many miniaturization techniques apply to the x/y space savings, such as smaller components, finer pitches, and closer component to component distances.This paper will explore the evolution of 3D assembly techniques, starting from flexible circuit technology, cavity assembly, embedded technology, 3 dimensional surface mount assembly, etc.
Technical Library | 2013-09-05 17:44:14.0
Surface plasmon polaritons (SPPs) are localized surface electromagnetic waves that propagate along the interface between a metal and a dielectric. Owing to their inherent subwavelength confinement, SPPs have a strong potential to become building blocks of a type of photonic circuitry built up on 2D metal surfaces; however, SPPs are difficult to control on curved surfaces conformably and flexibly to produce advanced functional devices. Here we propose the concept of conformal surface plasmons (CSPs), surface plasmon waves that can propagate on ultrathin and flexible films to long distances in a wide broadband range from microwave to mid-infrared frequencies.
Technical Library | 2016-10-03 08:28:47.0
With the miniaturization of electronic device, Land Grid Array (LGA) or QFN has been widely used in consumer electronic products. However there is only 20-30 microns gap left between LGA and the substrate, it is very difficult for capillary underfill to flow into the large LGA component at room temperature. Insufficient underfilling will lead to the loss of quality control and the poor reliability issue. In order to resolve these issues, a room temperature fast flow reworkable underfill has been successfully developed with excellent flowability. The underfill can flow into 20 microns gap and complete the flow of 15mm distance for about 30 seconds at room temperature. The curing behavior, storage, thermal cycling performance and reworkability will be discussed in details in this paper.
Technical Library | 2019-04-18 21:53:04.0
IPX9K Rain Spray Test Chamber(high Pressure high temperature water jet) simulates the use of pressure washer steam cleaning onto the enclosure, It is recognised as the harshest of all ingress protection tests. However the requirement is becoming more prevalent across many industries. Test method for IPX9K : Make sure the water temperature inside the water tank +80°C, water flow rate with 14L-16L per min, water pressure: 8000 Kpa -10000 Kpa (80–100 bar) at distance of 100mm~ 150mm, The test duration is 30 seconds in each of 4 angles, total spray testing time is 2 minutes. IPX9 rain test chamber applicable standards: IEC 60529 – Degrees of protection provided by enclosures (IP Code).Here is working principle in picture.
Technical Library | 2021-06-21 19:34:02.0
In this era of electronics miniaturization, high yield and low-cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate, the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µ whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade, the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has created unique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology, the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity, trace/via top planarity, which measures how flat the top of the traces and vias are a few major features. This is especially important in multilayer processing, as nonuniformity on a lower layer can be transferred to successive layers, disrupting the device design with catastrophic consequences such as short circuits. Additionally, a non-planar surface could also result in signal transmission loss by distortion of the connecting points, like vias and traces. Therefore, plating solutions that provide a uniform, planar profile without any special post treatment are quite desirable.
Technical Library | 2016-07-28 17:00:20.0
Packaging trends enable disruptive technologies. The miniaturization of components reduces the distance between conductive paths. Cleanliness of electronic hardware based on the service exposure of electrical equipment and controls can improve the reliability and cost effectiveness of the entire system. Problems resulting from leakage currents and electrochemical migration lead to unintended power disruption and intermittent performance problems due to corrosion issues.Solvent cleaning has a long history of use for cleaning electronic hardware. Limitations with solvent based cleaning agents due to environmental effects and the ability to clean new flux designs commonly used to join miniaturized components has limited the use of solvent cleaning processes for cleaning electronic hardware. To address these limitations, new solvent cleaning agents and processes have been designed to clean highly dense electronic hardware.The research study will evaluate the cleaning and electrical performance using the IPC B-52 Test Vehicle. Lead Free noclean solder paste will be used to join the components to the test vehicle. Ion Chromatography and SIR values will be reported.
Technical Library | 2018-09-21 10:12:53.0
Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work, focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes, with capacitance sensors located on the inner layers. For trapped volumes between copper planes, the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs, the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed, that in certain circumstances, regions of the PCB under copper planes initially increase in moisture during baking.
Technical Library | 2019-04-11 06:04:49.0
With the development of science and technology, the climatic chamber quality has been improved, and the failure rate is reduced, but there still have the failure probability.today we introduce what are the mian factors for big noise high low temperature test chamber: 1.External factors: the bottom angle is uneven, the ground is uneven, adjust the bottom angle, ensure the equipment is in a horizontal position; 2.The equipment is touched other objects or pushed against the wall,pls remove the objects and keep a certain distance from the wall. 3.Compressor noise:check whether the compressor collides with the pipeline,and evaporator dish is loose or not. 4.Check whether compressor shock absorbers are aging and replace them. 5.Solenoid valve noise: solenoid valve reversing caue loud sound, pls add damping glue, if no effect, need to replace solenoid valve. If there is AC noise, need to replace the power board. 6.Check wether the fan or the fan string shaft make noise,whether the fan blades are touched and deformed, whether the fan is fixed or not, pls adjust accordingly or add the rubber pad. If further technical questions,contact us without hesitation!---Climtest Symor® technical team
Technical Library | 2019-05-08 01:46:32.0
IPX9K Rain Spray Test Chamber(high Pressure high temperature water jet) simulates the use of pressure washer steam cleaning onto the enclosure, It is recognised as the harshest of all ingress protection tests. However the requirement is becoming more prevalent across many industries. Test method for IPX9K : Make sure the water temperature inside the water tank +80°C, water flow rate with 14L-16L per min, water pressure: 8000 Kpa -10000 Kpa (80–100 bar) at distance of 100mm~ 150mm, The test duration is 30 seconds in each of 4 angles, total spray testing time is 2 minutes. IPX9K rain test chamber applicable standards: IEC 60529 – Degrees of protection provided by enclosures (IP Code).Here is working principle in picture. Application: It is mainly suitable for testing the performance of shell and seal of electrical and electronic parts, automobile parts and seals under the condition of dripping rain to prevent Rain Water from permeating or working after drizzling.
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