Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2007-06-21 17:03:16.0
The rapid assimilation of Ball Grid Array (BGA) and other Area Array Package technology in the electronics industry is due to the fact that this package type allows for a greater I/O count in a smaller area while maintaining a pitch that allows for ease of manufacture (...) While there have been several studies comparing these two attachment methods, this study highlights the effect of rework technique on the electrical characteristics and reliability of reworked BGAs.
Technical Library | 2018-08-29 21:17:53.0
No-clean solder pastes are widely used in a number of applications that are exposed to wide variations in temperature during the life of the assembled electronics device. Some have observed that cracks can and do form in flux residue and have postulated that this is the result of or exacerbated by temperature cycling. Furthermore, the potential exists for the flux residue to soften or liquefy at elevated temperatures, and even flow if orientated parallel to gravity. In situations such as in automotive electronics, where significant temperature cycling is a reality and high reliability is a must, concern sometimes exists that the cracking and possible softening or liquefying of the residue may have a deleterious effect on the electrical reliability of the flux residue. This paper will attempt to address this concern.
Technical Library | 2013-04-11 15:43:17.0
With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to "glue" certain SMDs to the PCB. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue... First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2017-02-09 17:08:44.0
The SMT assembly world, especially within the commercial electronics realm, is dominated by no-clean solder paste technology. A solder paste flux residue that does not require removal is very attractive in a competitive world where every penny of assembly cost counts. One important aspect of the reliability of assembled devices is the nature of the no-clean solder paste flux residue. Most people in this field understand the importance of having a process that renders the solder paste flux residue as benign and inert as possible, thereby ensuring electrical reliability.But, of all the factors that play into the electrical reliability of the solder paste flux residue, is there any impact made by the age of the solder paste and how it was stored? This paper uses J-STD-004B SIR (Surface Insulation Resistance) testing to examine this question.
Technical Library | 2015-02-27 16:46:30.0
During the last period of newly assembled electrical devices (pcbs), new component types like LGA and QFN were also qualified as well as smaller passive components with reliability requirements based on the automotive and industrial industry. In the narrow gaps under components, residues can accumulate more by the capillary forces. This is not that much a surface resistance than an interface issue. Also that the flux residues under such types of components creates interaction with the solder resists from the pcb, as well as the component body was not completely described in the standard SIR measurement. On the other hand also, electrical influence with higher voltage creates new terms and conditions, in particular the combination of power and logic in such devices. The standard SIR measurement cannot analyze those combinations.The paper will discuss the requirements for a measurement process, and will give results. The influences of the pcb and component quality will also be discussed. Furthermore it will describe requirements for nc solder paste to increase the chemical/thermical/electrical reliability for whole devices
Technical Library | 2007-11-01 17:16:07.0
This paper discusses micro-filled epoxy-based conducting adhesives modified with nanoparticles, conducting polymers, and low melting point (LMP) fillers for z-axis interconnections, especially as they relate to package level fabrication, integration,
Technical Library | 1999-07-21 09:00:55.0
Isotropic conductive adhesives are typically silver filled epoxy resins. Electronics assemblers have evaluated these materials for a variety of unique interconnect applications. The goal is a conductive polymer that exhibits similar reliability and performance to traditional solder while offering the benefits of a polymer structure such as low temperature processing and good thermal stability as well as the ability to bond a variety of substrates.
Technical Library | 2019-02-13 13:45:11.0
Development of information and telecommunications network is outstanding in recent years, and it is required for the related equipment such as communication base stations, servers and routers, to process huge amount of data in no time. As an electrical signal becomes faster and faster, how to prevent signal delay by transmission loss is a big issue for Printed Circuit Boards (PCB) loaded on such equipments. There are two main factors as the cause of transmission loss; dielectric loss and conductor loss. To decrease the dielectric loss, materials having low dielectric constant and low loss tangent have been developed. On the other hand, reducing the surface roughness of the copper foil itself to be used or minimizing the surface roughness by modifying surface treatment process of the conductor patterns before lamination is considered to be effective in order to decrease the conductor loss. However, there is a possibility that reduction in the surface roughness of the conductor patterns will lead to the decrease in adhesion of conductor patterns to dielectric resin and result in the deterioration of reliability of PCB itself. In this paper, we will show the evaluation results of adhesion performance and electrical properties using certain type of dielectric material for high frequency PCB, several types of copper foil and several surface treatment processes of the conductor patterns. Moreover, we will indicate a technique from the aspect of surface treatment process in order to ensure reliability and, at the same time, to prevent signal delay at the signal frequency over 20 GHz.
Technical Library | 2017-08-10 01:23:22.0
This paper demonstrates the high frequency performance and thermo-mechanical reliability of through vias with 25 μm diameter at 50 μm pitch in 100 μm thin glass substrates. Scaling of through via interconnect diameter and pitch has several electrical performance advantages for high bandwidth 2.5D interposers as well as mm-wave components for 5G modules.
