Technical Library | 2019-10-21 09:58:50.0
An ACI Technologies customer inquired regarding printed circuit board(PCB) failures that were becoming increasingly prevalent after the SMT (surface mount technology) manufacturing process. The failures were detected by electrical testing, but were undetermined as to the location and specific devices causing the failures. The failures were suspected to be caused predominately in the BGA (ball grid array) devices located on specific sites on this 16 layer construction. Information that was provided on the nature of the failures (i.e., opens or shorts) included high resistance shorts that were occurring in those specified areas. The surface finish was a eutectic HASL (hot air solder leveling) and the solder paste used was a water soluble Sn/Pb(tin/lead).
Technical Library | 2020-12-07 15:26:06.0
Temperature cycling testing is a method of accelerated life testing done to PCCs that are exposed to normal operation temperature variations over its lifetime. During the testing, intermittent "open" failures can first occur at the hot and cold extremes of the test, exposing weaknesses in the design and assembly. A poor/weak solder joint fatigues, a via trace or barrel cracks, loose connections or a component fails all causing an intermittent open. When not at extreme temperatures, the PCC assembly relaxes, the "open" closes creating electrical connectivity. If you are monitoring the PCC under test in-situ you will know that an intermittent failure has occurred, and the test could be stopped for inspection. If in-situ monitoring was not implemented, you would not know if there were intermittent failures or not. The PCC gets powered up and works fine at room temperature.
Technical Library | 2019-12-05 13:30:46.0
Conformal coatings are regularly employed to protect the surface of a soldered printed circuit board assembly from moisture, chemicals in the PCBA's service environment, and foreign objects or debris. Conformal coatings are nonconductive and therefore cannot be placed on any location where electrical contact will be required, such as connector pins, test points, and sockets. Conformal coatings are also not permitted on any mechanical interface location, such as mounting holes or brackets, to assure the proper fit between items in the final assembly. In order to apply conformal coatings to an assembly and comply with the restrictions on keep-out areas, masking is employed to protect those surfaces.
Technical Library | 2007-06-21 17:03:16.0
The rapid assimilation of Ball Grid Array (BGA) and other Area Array Package technology in the electronics industry is due to the fact that this package type allows for a greater I/O count in a smaller area while maintaining a pitch that allows for ease of manufacture (...) While there have been several studies comparing these two attachment methods, this study highlights the effect of rework technique on the electrical characteristics and reliability of reworked BGAs.
Technical Library | 2019-04-07 23:34:10.0
Ingress Protection Test Chamber is used to determine the protection degree of product enclosures,the protection level provided by the enclosure is called IP code,our IP test chamber compeletely follow the standard IEC60529 and others. IP protection grade is an important index of electrical equipment safety protection. Protective-grade systems such as ip, which provide a method of classifying products in terms of dust-proof, waterproof and anti-collision levels of electrical equipment and packaging, which have been recognized by most European countries, as drafted by the International Electrotechnical Association (iec (international electro technical commission). And announced in ied529 (bs en 60529 / 1992) outer packing protection grade (ip code). The level of protection is expressed in terms of IP followed by two numbers, which are used to define the level of protection. The first number indicates the extent of the equipment‘s resistance to dust, or the degree to which people are protected from harm in sealed environments. I represents a level that prevents solid foreign matter from entering, with a maximum level of 6; The second number indicates the extent to which the equipment is waterproof. P represents the level of protection against influent and the highest level is 8. Such as the protection level of the motor ip65. Contact electrical equipment protection and external material protection level (first digit) Electrical equipment waterproof protection level (second digit) . IP is the international code used to identify the protection grade ip grade consists of two numbers, the first number for dust, and the second number for waterproof, the larger the number means the better protection level.
Technical Library | 2012-12-14 14:28:20.0
This paper examines the potential failure mechanisms that can damage modern lowvoltage CMOS devices and their relationship to electrical testing. Failure mechanisms such as electrostatic discharge (ESD), CMOS latch-up, and transistor gate oxide degradation can occur as a result of electrical over-voltage stress (EOS). In this paper, EOS due to electrical testing is examined and an experiment is conducted using pulsed voltage waveforms corresponding to conditions encountered during in-circuit electrical testing. Experimental results indicate a correlation between amplitude and duration of the pulse waveform and device degradation due to one or more of the failure mechanisms.
Technical Library | 2013-04-04 15:28:39.0
This paper will outline and define what requirements must be adhered to for the OEM community to truly achieve the IPC class product from the Electrical Test standpoint. This will include the test point optimization matrix, Isolation (shorts) parameters and Continuity (opens) parameters. This paper will also address the IPC Class III/A additional requirements for Aerospace and Military Avionics. The disconnect exists between OEMs understanding the requirements of their specific IPC class design versus the signature that will be presented from their design. This results in many Class III builds failing at Electrical Test... First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2022-10-04 16:43:10.0
In this paper I will discuss the different methods and equipment used to detect counterfeit electronic parts, specifically integrated circuits as well as demonstrate some of the "red flags" that help to identify a part as being suspected counterfeit. We will begin with the initial receipt of the parts and the examination of the outer packaging, the basic visual inspection of the parts, the visual inspection and documentation at high magnification, permanency marking, blacktop test, scrape test, XRF (RoHS), decapsulation, X-ray, basic electrical testing, C-SAM, full function testing and limited function testing.
Technical Library | 2013-08-07 21:52:15.0
PCB architectures have continued their steep trend toward greater complexities and higher component densities. For quality control managers and test technicians, the consequence is significant. Their ability to electrically test these products is compounded with each new generation. Probe access to high density boards loaded with micro BGAs using a conventional in-circuit (bed-of-nails) test system is greatly reduced. The challenges and complexity of creating a comprehensive functional test program have all but assured that functional test will not fill the widening gap. This explains why sales of automated-optical and automated X-ray inspection (AOI and AXI) equipment have dramatically risen...
Technical Library | 2019-02-06 22:02:08.0
The High Density Packaging (HDP) user group has completed a project to evaluate the majority of viable Dk (Dielectric Constant)/Df (Dissipation Factor) and delay/loss electrical test methods, with a focus on the methods used for speeds above 2 GHz. A comparison of test methods from 1 to 2 GHz through to higher test frequencies was desired, testing a variety of laminate materials (standard volume production with UL approval, low loss, and "halogen-free" laminate materials). Variations in the test board material resin content/construction and copper foil surface roughness/type were minimized. Problems with Dk/Df and loss test methods and discrepancies in results are identified, as well as possible correlations or relationships among these higher speed test methods.
