Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2023-08-16 18:02:27.0
One of our customers in the medical industry requested dam and fill application testing on a Kapton substrate. The material needed to be non-conductive for dispensing around electrical components, acting as structural support. Ultimately the product will be folded, therefore the footprint had to be small.
Technical Library | 2007-06-21 17:03:16.0
The rapid assimilation of Ball Grid Array (BGA) and other Area Array Package technology in the electronics industry is due to the fact that this package type allows for a greater I/O count in a smaller area while maintaining a pitch that allows for ease of manufacture (...) While there have been several studies comparing these two attachment methods, this study highlights the effect of rework technique on the electrical characteristics and reliability of reworked BGAs.
Technical Library | 2019-04-07 23:34:10.0
Ingress Protection Test Chamber is used to determine the protection degree of product enclosures,the protection level provided by the enclosure is called IP code,our IP test chamber compeletely follow the standard IEC60529 and others. IP protection grade is an important index of electrical equipment safety protection. Protective-grade systems such as ip, which provide a method of classifying products in terms of dust-proof, waterproof and anti-collision levels of electrical equipment and packaging, which have been recognized by most European countries, as drafted by the International Electrotechnical Association (iec (international electro technical commission). And announced in ied529 (bs en 60529 / 1992) outer packing protection grade (ip code). The level of protection is expressed in terms of IP followed by two numbers, which are used to define the level of protection. The first number indicates the extent of the equipment‘s resistance to dust, or the degree to which people are protected from harm in sealed environments. I represents a level that prevents solid foreign matter from entering, with a maximum level of 6; The second number indicates the extent to which the equipment is waterproof. P represents the level of protection against influent and the highest level is 8. Such as the protection level of the motor ip65. Contact electrical equipment protection and external material protection level (first digit) Electrical equipment waterproof protection level (second digit) . IP is the international code used to identify the protection grade ip grade consists of two numbers, the first number for dust, and the second number for waterproof, the larger the number means the better protection level.
Technical Library | 2010-03-11 19:33:47.0
Counterfeit products have been a growing problem worldwide, and the electronics industry has been no exception. Authentication of electronic components by electrical and physical testing can provide a cost-effective means of risk management, aimed at keeping counterfeits out of the supply chain. In this presentation, we will review sources of counterfeit components, and discuss the capabilities and limitations of test processes used for authentication. We will then present examples of component authentication using these tools.
Technical Library | 2021-11-29 01:10:58.0
ASHCROFT pressure transmitter is one of the most commonly used transmitters in industrial applications. It is widely used in a variety of control environments, involving water conservancy and hydropower, railway transportation, intelligent building, production automation, aerospace, military, petrochemical, oil wells, electric power, ships, machine tools and pipelines. ASHCROFT pressure transmitter is an electronic device that senses the pressure signal and converts it into an available output electrical signal according to certain rules.
Technical Library | 2018-11-29 13:43:54.0
Ionic contamination testing as a process control tool a newly developed testing protocol based on IPC-TM 650 2.3.25, was established to enable monitoring of ionic contamination within series production. The testing procedure was successfully implemented within the production of high reliability, safety critical electronic circuits, involving multiple production sites around the world. I will be shown in this paper that the test protocol is capable for meeting Six-Sigma-Criteria.
Technical Library | 2012-12-14 14:28:20.0
This paper examines the potential failure mechanisms that can damage modern lowvoltage CMOS devices and their relationship to electrical testing. Failure mechanisms such as electrostatic discharge (ESD), CMOS latch-up, and transistor gate oxide degradation can occur as a result of electrical over-voltage stress (EOS). In this paper, EOS due to electrical testing is examined and an experiment is conducted using pulsed voltage waveforms corresponding to conditions encountered during in-circuit electrical testing. Experimental results indicate a correlation between amplitude and duration of the pulse waveform and device degradation due to one or more of the failure mechanisms.
Technical Library | 2009-07-15 12:14:31.0
The increasing demand for smaller & smaller portable electrical devices is leading to the increasing usage of extremely small components in the SMT assembly lines. With the introduction of 01005 packages in mass production, all the different stages of the line are facing new challenges: from board design, through component placement to reflow process. Each stage introduces some specific types of defect which are considered impossible to repair due to the small size of the package. AOI has become an essential tool to enable good yield in the assembly of 01005.
Technical Library | 2013-05-10 18:12:15.0
In today’s manufacturing environments, optimizing manufacturing costs and, especially Test and Inspection costs are high on most company’s agendas. Resources are tight and many employees have multiple roles to fulfill across the whole manufacturing line so, time is limited. Test suppliers need to provide a suite of tools to ensure the highest level of quality for customer shipments.
