Technical Library | 2019-09-24 15:41:53.0
This paper focuses on three different coating material groups which were formulated to operate under high thermal stress and are applied at printed circuit board manufacturing level. While used for principally different applications, these coatings have in common that they can be key to a successful thermal management concept especially in e-mobility and lighting applications. The coatings consist of: Specialty (green transparent) liquid photoimageable solder masks (LPiSM) compatible with long-term thermal storage/stress in excess of 150°C. Combined with the appropriate high-temperature base material, and along with a suitable copper pre-treatment, these solder resists are capable of fulfilling higher thermal demands. In this context, long-term storage tests as well as temperature cycling tests were conducted. Moreover, the effect of various Cu pre-treatment methods on the adhesion of the solder masks was examined following 150, 175 and 200°C ageing processes. For this purpose, test panels were conditioned for 2000 hours at the respective temperatures and were submitted to a cross-cut test every 500 h. Within this test set-up, it was found that a multi-level chemical pre-treatment gives significantly better adhesion results, in particular at 175°C and 200°C, compared with a pre-treatment by brush or pumice brush. Also, breakdown voltage as well as tracking resistance were investigated. For an application in LED technology, the light reflectivity and white colour stability of the printed circuit board are of major importance, especially when high-power LEDs are used which can generate larger amounts of heat. For this reason, a very high coverage power and an intense white colour with high reflectivity values are essential for white solder masks. These "ultra-white" and largely non-yellowing LPiSM need to be able to withstand specific thermal loads, especially in combination with high-power LED lighting applications. The topic of thermal performance of coatings for electronics will also be discussed in view of printed heatsink paste (HSP) and thermal interface paste (TIP) coatings which are used for a growing number of applications. They are processed at the printed circuit board manufacturing level for thermal-coupling and heat-spreading purposes in various thermal management-sensitive fields, especially in the automotive and LED lighting industries. Besides giving an overview of the principle functionality, it will be discussed what makes these ceramic-filled epoxy- or silicone-based materials special compared to using "thermal greases" and "thermal pads" for heat dissipation purposes.
Technical Library | 2021-06-21 19:34:02.0
In this era of electronics miniaturization, high yield and low-cost integrated circuit (IC) substrates play a crucial role by providing a reliable method of high density interconnection of chip to board. In order to maximize substrate real-estate, the distance between Cu traces also known as line and space (L/S) should be minimized. Typical PCB technology consists of L/S larger than 40 µ whereas more advanced wafer level technology currently sits at or around 2 µm L/S. In the past decade, the chip size has decreased significantly along with the L/S on the substrate. The decreasing chip scales and smaller L/S distances has created unique challenges for both printed circuit board (PCB) industry and the semiconductor industry. Fan-out panel-level packaging (FOPLP) is a new manufacturing technology that seeks to bring the PCB world and IC/semiconductor world even closer. While FOPLP is still an emerging technology, the amount of high-volume production in this market space provide a financial incentive to develop innovative solutions in order to enable its ramp up. The most important performance aspect of the fine line plating in this market space is plating uniformity or planarity. Plating uniformity, trace/via top planarity, which measures how flat the top of the traces and vias are a few major features. This is especially important in multilayer processing, as nonuniformity on a lower layer can be transferred to successive layers, disrupting the device design with catastrophic consequences such as short circuits. Additionally, a non-planar surface could also result in signal transmission loss by distortion of the connecting points, like vias and traces. Therefore, plating solutions that provide a uniform, planar profile without any special post treatment are quite desirable.
Technical Library | 2020-10-27 02:07:31.0
For companies that choose to take the Pb-free exemption under the European Union's RoHS Directive and continue to manufacture tin-lead (Sn-Pb) electronic products, there is a growing concern about the lack of Sn-Pb ball grid array (BGA) components. Many companies are compelled to use the Pb-free Sn-Ag-Cu (SAC) BGA components in a Sn-Pb process, for which the assembly process and solder joint reliability have not yet been fully characterized. A careful experimental investigation was undertaken to evaluate the reliability of solder joints of SAC BGA components formed using Sn-Pb solder paste. This evaluation specifically looked at the impact of package size, solder ball volume, printed circuit board (PCB) surface finish, time above liquidus and peak temperature on reliability. Four different BGA package sizes (ranging from 8 to 45 mm2) were selected with ball-to-ball pitch size ranging from 0.5mm to 1.27mm. Two different PCB finishes were used: electroless nickel immersion gold (ENIG) and organic solderability preservative (OSP) on copper. Four different profiles were developed with the maximum peak temperatures of 210oC and 215oC and time above liquidus ranging from 60 to 120 seconds using Sn-Pb paste. One profile was generated for a lead-free control. A total of 60 boards were assembled. Some of the boards were subjected to an as assembled analysis while others were subjected to an accelerated thermal cycling (ATC) test in the temperature range of -40oC to 125oC for a maximum of 3500 cycles in accordance with IPC 9701A standard. Weibull plots were created and failure analysis performed. Analysis of as-assembled solder joints revealed that for a time above liquidus of 120 seconds and below, the degree of mixing between the BGA SAC ball alloy and the Sn-Pb solder paste was less than 100 percent for packages with a ball pitch of 0.8mm or greater. Depending on package size, the peak reflow temperature was observed to have a significant impact on the solder joint microstructural homogeneity. The influence of reflow process parameters on solder joint reliability was clearly manifested in the Weibull plots. This paper provides a discussion of the impact of various profiles' characteristics on the extent of mixing between SAC and Sn-Pb solder alloys and the associated thermal cyclic fatigue performance.
Manufacturer of PCB depaneling and PCB soldering machines since 2005, products include CE approval V-groove PCB depanelizer, PCB router, PCB punching machine, laser depaneling, hot bar soldering machines and soldering robots.
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