Technical Library | 1999-04-15 06:56:07.0
Solder paste is a seemingly simple material that forms one of the foundations of the surface mount assembly operation. If the solder paste does not do its job correctly then first pass yield will be severely reduced.
Technical Library | 2021-12-16 01:52:32.0
Package on Packages (PoP) find use in applications that require high performance with increased memory density. One of the greatest benefits of PoP technology is the elimination of the expensive and challenging task of routing high-speed memory lines from under the processor chip out to memory chip in separate packages. Instead, the memory sits on top of the processor and the connections are automatically made during assembly. For this reason PoP technology has gained wide acceptance in cell phones and other mobile applications. PoP technology can be assembled using one-pass and two-pass assembly processes. In the one-pass technique the processor is first mounted to the board, the memory is mounted to the processor and the finished board is then run through the reflow oven in a single pass. The two-pass technique has an intermediate step in which the memory is first mounted onto the processor.
Technical Library | 2010-03-04 18:11:53.0
While the electronics manufacturing industry has been occupied with the challenge of RoHS compliance and with it, Pb-free soldering, established trends of increasing functionality and miniaturization have continued. The increasing use of ultra-fine pitch and area-array devices presents challenges in both printing and flux technology. With the decrease in both the size and the pitch of said components, new problems may arise, such as head-in-pillow and graping defects
Technical Library | 2016-03-17 19:09:46.0
The rapid growth of electronic devices across the globe is driving manufacturers to enhance high-speed mass production techniques in the PCB assembly arena. As manufacturers drive to reduce costs while maximizing production by expanding facilities, updating automation equipment, or implementing lean six sigma techniques, the potential to build scrap product or rework printed circuit boards increases dramatically.Manufacturers have two general paths to reduce the costs of high-speed printed circuit board assembly production. The first path is to reduce cost by focusing on high quality printing and mounting. The other, increasingly popular option is to utilize low-cost materials. In either case, the baseline must provide a consistent high-speed solder paste printing method, which considers the fill, snap-off, and cleaning processes.Building on our expertise and testing, this paper will highlight the two trains of thought with specific focus on how low-cost materials affect print performance. It will also explore technologies, which can help provide stable, high-speed screen printing.
Technical Library | 2015-04-03 20:02:31.0
Understanding your process and how to minimize defects has always been important. Nowadays, its importance is increasing with the complexity of products and the customers demand for higher quality. Quality Management Solutions (QMS) that integrate real-time test and inspection results with engineering and production data, can allow the optimization of the entire manufacturing process. We will describe the cost and time benefits of a QMS system when integrated with engineering data and manufacturing processes. We will use real examples that can be derived from integrating this data. This paper also discusses the aspects of Quality Management Software that enables electronic manufacturers to efficiently deliver products while achieving higher quality, reduce manufacturing costs and cutting repair time. Key words: Quality Management Software, ICT, Repair workstations, First Pass Yield, Pareto analysis, Flying Probe, QMS.
Technical Library | 2018-07-18 16:28:26.0
Reduction of first pass defects in the SMT assembly process minimizes cost, assembly time and improves reliability. These three areas, cost, delivery and reliability determine manufacturing yields and are key in maintaining a successful and profitable assembly process. It is commonly accepted that the solder paste printing process causes the highest percentage of yield challenges in the SMT assembly process. As form factor continues to get smaller, the challenge to obtain 100% yield becomes more difficult.This paper will identify defects affecting SMT yields in the printing process and discuss their Root Cause. Outer layer copper weight and surface treatment will also be addressed as to their effect on printability. Experiments using leadless and emerging components will be studied and root cause analysis will be presented
Technical Library | 2016-08-11 15:49:59.0
The challenge for 3D IC assembly is how to manage warpage and thin wafer handling in order to achieve a high assembly yield and to ensure that the final structure can pass the specified reliability requirements. Our test vehicles have micro-bumped die having pitches ranging from 60um down to 30um. The high density of pads and the large die size, make it extremely challenging to ensure that all of the micro-bump interconnects are attached to a thin Si-interposer. In addition, the low standoff between the die and interposer make it difficult to underfill. A likely approach is to first attach the die to the interposer and then the die/interposer sub-assembly to the substrate. In this scenario, the die/interposer sub-assembly is comparable to a monolithic silicon die that can be flip chip attached to the substrate. In this paper, we will discuss various assembly options and the challenges posed by each. In this investigation, we will propose the best method to do 2.5D assembly in an OSAT(Outsourced Assembly and Test) facility.
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