Technical Library | 2021-05-20 13:55:14.0
Quality Control is essential in production processes. In the PCB Assembly process there are several Quality Control steps or options. The most popular tests are the electrical (In-Circuit or ICT) and the function (functional or FCT/FVT) test. ICT test fixtures are standardized and there are several major test platforms available which are industry standards. For FCT applications there are many more variations possible due to the vast number of testers and interface approaches unique to each customer; also due to an endless list of applications which fall under the category of Functional Test (RF, High Current, LED test, Leak test etc.) Test Probes are a very important part in ICT as well as in FCT applications. If the wrong test probe (type, spring force, tip style etc.) is used, the test fixture will not work as intended. In addition the test probe must be installed correctly in order to work properly. This presentation will show general information and some guidelines for a proper Test Fixture design to assure the most efficient production.
Technical Library | 2019-01-30 21:20:47.0
Due to the arrayed nature of the Computed Tomography (CT) Detector, high density area array interconnect solutions are critical to the functionality of the CT detector module. Specifically, the detector module sensor element, hereby known as the Multi-chip module (MCM), has a 544 position BGA area array pattern that requires precise test stimulation. A novel pogo-pin block array and corresponding motorized test socket has been designed to stimulate the MCM and acquire full functional test data. (...) This paper and presentation will focus on the socket design challenges and also key learnings from the design that can be applied to general test systems, including reliability testing. The secondary focus will be on the overall data collection and graphical user interface for the test equipment.
Technical Library | 2009-11-05 11:17:32.0
Head-in-pillow (HiP), also known as ball-and-socket, is a solder joint defect where the solder paste deposit wets the pad, but does not fully wet the ball. This results in a solder joint with enough of a connection to have electrical integrity, but lacking sufficient mechanical strength. Due to the lack of solder joint strength, these components may fail with very little mechanical or thermal stress. This potentially costly defect is not usually detected in functional testing, and only shows up as a failure in the field after the assembly has been exposed to some physical or thermal stress.
Technical Library | 2018-12-12 22:20:22.0
Numerous 3D stack packaging technologies have been implemented by industry for use in microelectronics memory applications. This paper presents a reliability evaluation of a particular package-on-package (PoP) that offers a reduction in overall PCB board area requirements while allowing for increases in functionality. It utilizes standard, readily available device packaging methods in which high-density packaging is achieved by: (1) using standard "packaged" memory devices, (2) using standard 3-dimensional (3-D) interconnect assembly. The stacking approach provides a high level of functional integration in well-established and already functionally tested packages. The stack packages are built from TSOP packages with 48 leads, stacked either 2-high or 4-high, and integrated into a single dual-flat-no-lead (DFN) package.
Technical Library | 2013-07-25 14:02:15.0
Bottom-termination components (BTC), such as QFNs, are becoming more common in PCB assemblies. These components are characterized by hidden solder joints. How are defects on hidden DFN joints detected? Certainly, insufficient solder joints on BTCs cannot be detected by manual visual inspection. Nor can this type of defect be detected by automated optical inspection; the joint is hidden by the component body. Defects such as insufficients are often referred to as "marginal" defects because there is likely enough solder present to make contact between the termination on the bottom-side of the component and the board pad for the component to pass in-circuit and functional test. Should the board be subjected to shock or vibration, however, there is a good chance this solder connection will fracture, leading to an open connection.
Technical Library | 2020-07-08 20:05:59.0
There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.
Technical Library | 2015-12-17 17:24:17.0
Product quality can be improved through proper application of design for test (DFT) strategies. With today's shrinking product sizes and increasing functionality, it is difficult to get good test coverage of loaded printed circuit boards due to the loss of test access. Advances in test techniques, such as boundary scan, help to recover this loss of test coverage. However, many of these test techniques need to be designed into the product to be effective.This paper will discuss how to maximize the benefits of boundary scan test, including specific examples of how designers should select the right component, connect multiple boundary scan components in chains, add test access to the boundary scan TAP ports, etc. A discussion of DFT guidelines for PCB layout designers is also included. Finally, this paper will include a description of some advanced test methods used in in-circuit tests, such as vectorless test and special probing methods, which are implemented to improve test coverage on printed circuit boards with limited test access.
Technical Library | 2015-01-28 17:39:34.0
Stacking heterogeneous semiconductor die (memory and logic) within the same package outline can be considered for less complex applications but combining the memory and processor functions in a single package has compromised test efficiency and overall package assembly yield. Separation and packaging the semiconductor functions into sections, on the other hand, has proved to be more efficient and, even though two interposers are required, more economical. The separated logic and memory sections are configured with the same uniform outline for vertical stacking (package-on-package). The most common configuration places the logic section as the base with second tier memory section soldered to a mating contact pattern. This paper addresses the primary technological challenges for reducing contact pitch and package-on-package interface technology.
Technical Library | 2020-05-28 02:19:28.0
Properly functioning printed circuit boards are essential for both manufacturers of electronic devices and also the developers if the overall intent is for the electronic device to function at high capacity. From designing the schematics of the printed circuit boards to testing the products, there is no process of PCB manufacturing and/or assembly that can be taken for granted. While it's true that you can attempt this process on your own, especially if you are in possession of a large scale manufacturing facility, here are a few reasons why it would be a better option to opt for a professional company for PCB manufacturing and assembly. 1. Variety A professional printed circuit boards manufacturing company will be able to offer you a huge variety. You will be able to choose from rigid, flexible, or rigid-flex. What's more, the PCBs will be customized as per the need of the application. 2. Quality Professional and good printed circuit board manufacturing and assembling companies might cost you just a little bit extra but they also guarantee to produce the best results and offer very high quality products. In the end, it is quality that will make the difference between mediocre and a high functioning PCB. 3. Cost Efficiency Since you don't have to waste time or resources on buying equipment to produce the best PCBs or hiring staff to oversee the process, you can actually end up saving money. You can even save on PCB assembly cost by hiring this job out. All you have to do is to negotiate the quote and sit back, relax, and wait for the PCBs to be delivered to you. 4. Eliminate Design Flaws Design engineers hired by PCB manufacturing and assembling companies use the best graphic software to develop and test the schematics of PCBs. This increases the chances of eliminating flaws in the printed circuit boards during the initial design phase. 5. Multilayer PCB Manufacturing and Assembly The process of manufacturing and assembling multilayer PCBs is as intricate as it sounds. All processes of manufacturing and assembling multilayer PCBs require the best machines and trained technicians to pass the quality and functionality tests. Manufacturing and assembling multilayer printed circuit boards yourself is going to cost you a lot. Even the smallest of mistakes during the manufacturing and assembling process might render the entire PCB entirely useless. 6. Save Time PCBs are just a single part of the electronic device. To complete the device, many more pieces would be needed. The manufacturers of the electronic device can hire out the job of manufacturing or assembling the PCBs, which will mean they will have one less chore to do. This, in turn, will save you a lot of time which could be spent on elevating the quality of the product. 7. Experience Experience makes all the difference. It is what makes the name of any company reliable in the market. Long experience of manufacturing and assembling printed circuit boards makes the company well versed in the process and it also makes it an expert to identify design, manufacturing, assembling, and testing needs of certain applications We, at Asia Pacific Circuits, offer these benefits and so much more. For quick turn PCB assembly, PCB manufacturing and PCB designing, you can contact us anytime.
Technical Library | 2018-08-01 11:25:59.0
With complexities of PCB design scaling and manufacturing processes adopting to environmentally friendly practices raise challenges in ensuring structural quality of PCBs. This makes it essential to have a good 'Design for Test' (DFT) to ensure a robust structural test. (...)During the course of the DFT review, can we realize a good test strategy for the PCBA. How can the test strategy of the PCBA be partitioned as to what portions of the design can be covered structurally and what is covered functionally, in a way that provides best diagnostics to discover faults
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