Technical Library: functional test capacitors (Page 3 of 6)

Comparing Costs and ROI of AOI and AXI

Technical Library | 2013-08-07 21:52:15.0

PCB architectures have continued their steep trend toward greater complexities and higher component densities. For quality control managers and test technicians, the consequence is significant. Their ability to electrically test these products is compounded with each new generation. Probe access to high density boards loaded with micro BGAs using a conventional in-circuit (bed-of-nails) test system is greatly reduced. The challenges and complexity of creating a comprehensive functional test program have all but assured that functional test will not fill the widening gap. This explains why sales of automated-optical and automated X-ray inspection (AOI and AXI) equipment have dramatically risen...

Teradyne

Test Fixture Design Presentation ICT & FCT Test Fixtures

Technical Library | 2021-05-20 13:55:14.0

Quality Control is essential in production processes. In the PCB Assembly process there are several Quality Control steps or options. The most popular tests are the electrical (In-Circuit or ICT) and the function (functional or FCT/FVT) test. ICT test fixtures are standardized and there are several major test platforms available which are industry standards. For FCT applications there are many more variations possible due to the vast number of testers and interface approaches unique to each customer; also due to an endless list of applications which fall under the category of Functional Test (RF, High Current, LED test, Leak test etc.) Test Probes are a very important part in ICT as well as in FCT applications. If the wrong test probe (type, spring force, tip style etc.) is used, the test fixture will not work as intended. In addition the test probe must be installed correctly in order to work properly. This presentation will show general information and some guidelines for a proper Test Fixture design to assure the most efficient production.

INGUN Pruefmittelbau GmbH

Using JTAG Emulation for Board-Level Functional Test Demanding Test

Technical Library | 2010-09-02 13:13:03.0

As chip packaging and interconnectivity have become more dense and operate at higher clock frequencies, physical access for traditional bed-of-nails testing becomes limited. This results in loss of ICT (in-circuit test) fault coverage and higher test fi

Corelis Inc

Novel Probing Concepts for Mass-Production Tests: Design and Challenges

Technical Library | 2012-06-15 00:43:47.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. The world of spring-loaded test probes and special probes for in-circuit and functional tests have grown tremendously over the past few years. Ever increasing demands for electro

INGUN Pruefmittelbau GmbH

Application Of Build-in Self Test In Functional Test Of DSL

Technical Library | 2012-05-23 14:16:41.0

first published in the 2012 IPC APEX EXPO technical conference proceedings. BIST (build-in self test ) is the technique of designing additional hardware and software features into integrated circuits to allow them to perform self-testing, i.e., testing of

Flex (Flextronics International)

Early Design Review of Boundary Scan in Enhancing Testability and Optimization of Test Strategy

Technical Library | 2018-08-01 11:25:59.0

With complexities of PCB design scaling and manufacturing processes adopting to environmentally friendly practices raise challenges in ensuring structural quality of PCBs. This makes it essential to have a good 'Design for Test' (DFT) to ensure a robust structural test. (...)During the course of the DFT review, can we realize a good test strategy for the PCBA. How can the test strategy of the PCBA be partitioned as to what portions of the design can be covered structurally and what is covered functionally, in a way that provides best diagnostics to discover faults

Keysight Technologies

Novel Pogo-Pin Socket Design for Automated Low Signal Linearity Testing of CT Detector Sensor

Technical Library | 2019-01-30 21:20:47.0

Due to the arrayed nature of the Computed Tomography (CT) Detector, high density area array interconnect solutions are critical to the functionality of the CT detector module. Specifically, the detector module sensor element, hereby known as the Multi-chip module (MCM), has a 544 position BGA area array pattern that requires precise test stimulation. A novel pogo-pin block array and corresponding motorized test socket has been designed to stimulate the MCM and acquire full functional test data. (...) This paper and presentation will focus on the socket design challenges and also key learnings from the design that can be applied to general test systems, including reliability testing. The secondary focus will be on the overall data collection and graphical user interface for the test equipment.

General Electric

Overcoming Logistic, Economic and Technical Challenges to Implementing Functional Test in High Mix / High Volume Production Environments

Technical Library | 2012-11-29 14:23:58.0

1000 units per day) production environment presents challenging technical, logistic and cost obstacles that are usually more complex than those encountered at the inspection (automated optical inspection) and the manufacturing process test step (in-circuit test).

SiFO Technologies

Good Product Quality Comes From Good Design for Test Strategies

Technical Library | 2015-12-17 17:24:17.0

Product quality can be improved through proper application of design for test (DFT) strategies. With today's shrinking product sizes and increasing functionality, it is difficult to get good test coverage of loaded printed circuit boards due to the loss of test access. Advances in test techniques, such as boundary scan, help to recover this loss of test coverage. However, many of these test techniques need to be designed into the product to be effective.This paper will discuss how to maximize the benefits of boundary scan test, including specific examples of how designers should select the right component, connect multiple boundary scan components in chains, add test access to the boundary scan TAP ports, etc. A discussion of DFT guidelines for PCB layout designers is also included. Finally, this paper will include a description of some advanced test methods used in in-circuit tests, such as vectorless test and special probing methods, which are implemented to improve test coverage on printed circuit boards with limited test access.

Agilent Technologies, Inc.

Embedding Passive and Active Components: PCB Design and Fabrication Process Variations

Technical Library | 2016-06-16 15:29:31.0

Embedding components within the PC board structure is not a new concept. Until recently, however, most embedded component PC board applications adapted only passive elements. The early component forming processes relied on resistive inks and films to enable embedding of resistor and capacitors elements. Although these forming methods remain viable, many companies are choosing to place very thin discrete passive components and semiconductor die elements within the PC board layering structure. In addition to improving the products performance, companies have found that by reducing the component population on the PC board's surface, board level assembly is less complex and the PC board can be made smaller, The smaller substrate, even when more complex, often results in lower cost. Although size and cost reductions are significant attributes, the closer coupling of key elements can also contribute to improving functional performance.This paper focuses on six basic embedded component structure designs described in IPC-7092.

Vern Solberg - Solberg Technical Consulting


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