Technical Library | 2021-03-04 15:22:33.0
Copper clad laminates (CCLs) with low dissipation factor (Df) are urgently needed in the fields of high-frequency communications devices. A novel resin matrix of modified poly (2,6-dimethyl-1,4- phenylene ether) (MPPE) and styrene-ethylene/butylene-styrene (SEBS) was employed in the fabrication of high-frequency copper clad laminates (CCLs). The composites were reinforced by E-glass fabrics, which were modified with phenyltriethoxysilane (PhTES). The composite laminates obtained exhibited impressive dielectric loss of 0.0027 at 10 GHz when the weight ratio of MPPE to SEBS was 5:1.
Technical Library | 2018-10-31 20:35:49.0
The electronics industry has grown immensely over the last few decades owing to the rapid growth of consumer electronics in the modern world. New formulations are essential to fit the needs of manufacturing printed circuit boards and semiconductors. Copper electrolytes for high throwing power applications with high thermal reliability and high throughput are becoming extremely important for manufacturing high aspect ratio circuit boards.Here we discuss innovative DC copper metallization formulations for hoist lines and VCP (Vertical Continues Plating) applications with high thermal reliability and throughput for high aspect ratio PCB manufacturing
Technical Library | 2015-04-30 20:17:03.0
Higher-speed signal transmission is increasingly required on a printed circuit board to handle massive data in electronic systems. So, signal transmission loss of copper wiring on a printed circuit board has been studied. First, total signal loss was divided into dielectric loss and conductor loss quantitatively based on electromagnetic theory. In particular, the scattering loss due to surface roughness of copper foil has been examined in detail. And the usefulness of the copper foil with low surface roughness has been demonstrated.
Technical Library | 2021-05-26 00:53:26.0
This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, build-up technology incorporating microvias has emerged as a viable multilayer printed circuit manufacturing technology. Increased wiring density, reduced line widths, smaller through-holes and microvias are all attributes of these High Density Interconnect (HDI) packages. Filling the microvias with conductive material allows the use of stacked vias and via in pad designs thereby facilitating additional packaging density. Other potential design attributes include thermal management enhancement and benefits for high frequency circuitry. Electrodeposited copper can be utilized for filling microvias and provides potential advantages over alternative via plugging techniques. The features, development, scale up and results of direct current (DC) and periodic pulse reverse (PPR) acid copper via filling processes, including chemistry and equipment, are described.
Technical Library | 2020-09-02 22:02:13.0
With the adoption of Wafer Level Packages (WLP) in the latest generation mobile handsets, the Printed Circuit Board (PCB) industry has also seen the initial steps of High Density Interconnect (HDI) products migrating away from the current subtractive processes towards a more technically adept technique, based on an advanced modified Semi Additive Process (amSAP). This pattern plate process enables line and space features in the region of 20um to be produced, in combination with fully filled, laser formed microvias. However, in order to achieve these process demands, a step change in the performance of the chemical processes used for metallization of the microvia is essential. In the electroless Copper process, the critical activator step often risks cross contamination by the preceding chemistries. Such events can lead to uncontrolled buildup of Palladium rich residues on the panel surface, which can subsequently inhibit etching and lead to short circuits between the final traces. In addition, with more demands being placed on the microvia, the need for a high uniformity Copper layer has become paramount, unfortunately, as microvia shape is often far from ideal, the deposition or "throw" characteristics of the Copper bath itself are also of critical importance. This "high throwing power" is influential elsewhere in the amSAP technique, as it leads to a thinner surface Copper layer, which aids the etching process and enables the ultra-fine features being demanded by today's high end PCB applications. This paper discusses the performance of an electroless Copper plating process that has been developed to satisfy the needs of challenging amSAP applications. Through the use of a radical predip chemistry, the formation, build up and deposition of uncontrolled Pd residues arising from activator contamination has been virtually eradicated. With the adoption of a high throwing power Copper bath, sub 30um features are enabled and microvia coverage is shown to be greatly improved, even in complex via shapes which would otherwise suffer from uneven coverage and risk premature failure in service. Through a mixture of development and production data, this paper aims to highlight the benefits and robust performance of the new electroless Copper process for amSAP applications
Technical Library | 2018-08-15 17:27:28.0
Smartphones and tablets require very high flexibility and severe bending performance ability of the flexible printed circuits (FPCs) to fit into their thinner and smaller body designs. In these FPCs, the extraordinary highly flexible, treated rolled-annealed (RA) copper foils have recently used instead of regular RA foil and electro deposited foils. It is very important to measure the Young's moduli of these foils predicting the mechanical properties of FPCs such as capabilities of fatigue endurance, folding, and so on. Even though the manufacturers use IPC TM-650 2.4.18.3 test method for measuring Young's modulus of copper foils over many years, where Young's modulus is calculated from the stress–strain (S–S) curve, it is quite difficult to obtain the accurate Young's modulus of metal foils by this test method.
Technical Library | 2021-07-06 21:20:38.0
The evolution of internet-enabled mobile devices has driven innovation in the manufacturing and design of technology capable of high-frequency electronic signal transfer. Among the primary factors affecting the integrity of high-frequency signals is the surface finish applied on PCB copper pads – a need commonly met through the electroless nickel immersion gold process, ENIG. However, there are well-documented limitations of ENIG due to the presence of nickel, the properties of which result in an overall reduced performance in high-frequency data transfer rate for ENIG-applied electronics, compared to bare copper.
Technical Library | 2019-06-26 23:21:49.0
Copper-filled micro-vias are a key technology in high density interconnect (HDI) designs that have enabled increasing miniaturization and densification of printed circuit boards for the next generation of electronic products. Compared with standard plated through holes (PTHs) copper filled vias provide greater design flexibility, improved signal performance, and can potentially help reduce layer count, thus reducing cost. Considering these advantages, there are strong incentives to optimize the via filling process. This paper presents an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications which rapidly fills vias while minimizing surface plating.
Technical Library | 2017-04-20 13:51:14.0
The one constant in electronics manufacturing is change. Moore's Law, which successfully predicted a rate of change at which transistor counts doubled on Integrated Circuits (ICs) at lower cost for decades, is ceding to be an appropriate prediction tool. Increasing technical and economic requirements, deriving from the semiconductor environment, are cascaded down to the printed circuit and in particular to the IC substrate manufacturers. This is both a challenge and an opportunity for IC Substrate manufacturers, when dealing with the demands of the packaging market. (...)This paper introduces two new electroless copper baths developed for IC substrates manufacturing based on Semi Additive Process (SAP) technology (hereafter referred to as E'less Copper IC) and HDI production (hereafter referred to as E'less Copper HDI) and optimized for high throw into BMVs. An introduction to reliable throwing power measurement methods based on scanning electron microscope (SEM) is given, followed by a compilation and discussion of key performance criteria for each application, namely throwing power, copper adhesion on the substrate, dry film adhesion and reliability.
Technical Library | 2020-08-05 18:49:32.0
The evolution of internet-enabled mobile devices has driven innovation in the manufacturing and design of technology capable of high-frequency electronic signal transfer. Among the primary factors affecting the integrity of high-frequency signals is the surface finish applied on PCB copper pads – a need commonly met through the electroless nickel immersion gold process, ENIG. However, there are well-documented limitations of ENIG due to the presence of nickel, the properties of which result in an overall reduced performance in high-frequency data transfer rate for ENIG-applied electronics, compared to bare copper. An innovation over traditional ENIG is a nickel-less approach involving a special nano-engineered barrier designed to coat copper contacts, finished with an outermost gold layer. In this paper, assemblies involving this nickel-less novel surface finish have been subjected to extended thermal exposure, then intermetallics analyses, contact/sheet resistance comparison after every reflow cycle (up to 6 reflow cycles) to assess the prevention of copper atoms diffusion into gold layer, solder ball pull and shear tests to evaluate the aging and long-term reliability of solder joints, and insertion loss testing to gauge whether this surface finish can be used for high-frequency, high density interconnect (HDI) applications.
