Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 1999-05-06 12:08:08.0
Input voltage capacitors are typically the parts that fail first in a high power circuit. Today's requirements for increasingly smaller packages is driving high component densities in power systems, as in all systems. As the package size...
Technical Library | 2009-02-26 03:25:09.0
STI has developed a patented1 packaging technology coined Imbedded Component/Die Technology (IC/DT®) to integrate multiple subsystems within an electronics assembly into a single, advanced, high-density assembly. Imbedded Component/Die Technology (IC/DT®) enables the manufacturing and assembly of smaller, lighter, and more technologically advanced high density CCAs through imbedding unpackaged components in a 3-D laminate substrate with integrated thermal management
Technical Library | 2021-12-21 23:01:30.0
High density PWB (printed wiring board) with microvia technology is required for implementation of high density and high I/O area array packages (AAP). COTS (commercial off-the-shelf) AAP packaging technologies in high reliability versions with 1.27 mm pitch are now being considered for use in a number of NASA systems including the Space Shuttle and Mars Rovers. NASA functional system designs are requiring ever more denser AAP packages and board features, making board microvia technology very attractive for effectively routing a large number of package inputs/outputs.
Technical Library | 2018-02-28 22:28:30.0
Circuit functional density requirements continue to drive innovative approaches to high performance packaging. Some new approaches include; aggressive space reduction, embedded solutions, and those that offer some form of risk reduction and rework potential are now options that are being explored by customers. Requirements for assembly of these types of packages necessitate the deposition of solder paste and assembly of components into cavities of the substrates to gain z-axis density as well as area functional density. Advances in the fabrication of PWB’s with cavities using newly developed laser micro-fabrication processes along with increased circuit pitch density of 50 micron lines and spaces permit new applications for high performance electronic substrates. First published at SMTA Pan Pacific Symposium
Technical Library | 2016-11-03 17:53:56.0
We present a novel method for fabricating a high-density carbon nanotube microelectrode array (MEA) chip. Vertically aligned carbon nanotubes (VACNTs) were synthesized by microwave plasma-enhanced chemical vapor deposition and thermal chemical vapor deposition. The device was characterized using electrochemical experiments such as cyclic voltammetry, impedance spectroscopy and potential transient measurements. Through-silicon vias (TSVs) were fabricated and partially filled with polycrystalline silicon to allow electrical connection from the high-density electrodes to a stimulator microchip.In response to the demand for higher resolution implants, we have developed a unique process to obtain a high-density electrode array by making the microelectrodes smaller in size and designing new ways of routing the electrodes to current sources.
Technical Library | 2009-07-22 18:33:41.0
This paper deals with the thermal effects of joule heating in a high interconnect density, thin core, buildup, organic flip chip substrate. The 440 μm thick substrate consists of a 135 μm thick core with via density of about 200 μm. The typical feature sizes in the substrate are 50 micron diameter vias is the core/buildup layers and 12 micron thick metal planes. An experimental test vehicle is powered with current and the temperature rise was measured. A numerical model was used to simulate the temperature rise in the TV.
Technical Library | 2009-12-09 19:47:15.0
For the mobile market some PCB assemblies have been converted to flex circuit assemblies, in part because flex circuit assembly can be twisted or bent per the application needs. Flex circuits offer the same advantages as conventional printed circuit boards: quality, reliability, and high density.
Technical Library | 2017-09-27 18:46:58.0
Flex and rigid flex circuits have become increasingly popular in the high-density electronics industry for their cost-saving three-dimensional configurations. The ability to build circuitry to fit the device instead of the other way around, offers significant advantages for complex aerospace, military, and medical device applications.
Technical Library | 2015-02-05 23:23:40.0
Ball grid arrays are the boon and bane of engineers and printed circuit board designers the world over. Their unparalleled pin density and low lead inductance are essential in today's high pin count, high frequency integrated circuits. However, that same pin density and unique interface create a challenge unique unto themselves. These challenges need to be faced head on since the ball grid array (BGA) is prevalent in modern PCBs. While there are entire textbooks that cover the topic of BGAs, their use and fanout techniques, the quick overview provided here offers an engineer a good starting point for improving BGA designs.
