Technical Library: in circuit testing (Page 7 of 17)

Early Design Review of Boundary Scan in Enhancing Testability and Optimization of Test Strategy

Technical Library | 2018-08-01 11:25:59.0

With complexities of PCB design scaling and manufacturing processes adopting to environmentally friendly practices raise challenges in ensuring structural quality of PCBs. This makes it essential to have a good 'Design for Test' (DFT) to ensure a robust structural test. (...)During the course of the DFT review, can we realize a good test strategy for the PCBA. How can the test strategy of the PCBA be partitioned as to what portions of the design can be covered structurally and what is covered functionally, in a way that provides best diagnostics to discover faults

Keysight Technologies

An Intelligent Approach For Improving Printed Circuit Board Assembly Process Performance In Smart Manufacturing

Technical Library | 2021-08-04 18:46:25.0

The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.

Hong Kong Polytechnic University [The]

Boundary Scan Skews Test Coverage Tradeoffs in your Favor

Technical Library | 2007-08-23 14:30:03.0

The complexity and programmability of modern embedded boards means that knowledge built up during debugging and testing must be regarded as Intellectual Property (IP) and therefore preserved. But many of the processes and tools used today do not provide a means to preserve or pass on this IP, and thereby forego valuable opportunities to save time and improve quality during subsequent stages of product development.

XJTAG

Low Cycle Fatigue Behaviour of Multi-joint Sample in Mechanical Testing

Technical Library | 2013-03-21 21:24:49.0

This paper explores the behaviour of a copper test vehicle with multiple reflowed solder joints, which has direct relevance to ball grid arrays (BGA) and high density interconnect structures. The paper explores the relative stress conditions on the distributed joints and the sensitivity to ball joint shape... First published in the 2012 IPC APEX EXPO technical conference proceedings

National Physical Laboratory

Developments in Electroless Copper Processes to Improve Performance in amSAP Mobile Applications

Technical Library | 2020-09-02 22:02:13.0

With the adoption of Wafer Level Packages (WLP) in the latest generation mobile handsets, the Printed Circuit Board (PCB) industry has also seen the initial steps of High Density Interconnect (HDI) products migrating away from the current subtractive processes towards a more technically adept technique, based on an advanced modified Semi Additive Process (amSAP). This pattern plate process enables line and space features in the region of 20um to be produced, in combination with fully filled, laser formed microvias. However, in order to achieve these process demands, a step change in the performance of the chemical processes used for metallization of the microvia is essential. In the electroless Copper process, the critical activator step often risks cross contamination by the preceding chemistries. Such events can lead to uncontrolled buildup of Palladium rich residues on the panel surface, which can subsequently inhibit etching and lead to short circuits between the final traces. In addition, with more demands being placed on the microvia, the need for a high uniformity Copper layer has become paramount, unfortunately, as microvia shape is often far from ideal, the deposition or "throw" characteristics of the Copper bath itself are also of critical importance. This "high throwing power" is influential elsewhere in the amSAP technique, as it leads to a thinner surface Copper layer, which aids the etching process and enables the ultra-fine features being demanded by today's high end PCB applications. This paper discusses the performance of an electroless Copper plating process that has been developed to satisfy the needs of challenging amSAP applications. Through the use of a radical predip chemistry, the formation, build up and deposition of uncontrolled Pd residues arising from activator contamination has been virtually eradicated. With the adoption of a high throwing power Copper bath, sub 30um features are enabled and microvia coverage is shown to be greatly improved, even in complex via shapes which would otherwise suffer from uneven coverage and risk premature failure in service. Through a mixture of development and production data, this paper aims to highlight the benefits and robust performance of the new electroless Copper process for amSAP applications

Atotech

Thick Film Polymer Resistors Embedded in Printed Circuit Boards

Technical Library | 2010-04-15 20:42:44.0

The high level of current interest in embedded passives in printed circuit boards is driven by the tremendous pressure to pack more circuitry into smaller spaces. However, adoption has been limited due to design, prototyping and infrastructure issues, as well as the stability and tolerances necessary for widespread replacement of discretes. The focus of this work has been to develop a polymer thick film resistor technology to incorporate reliable organic resistors inside printed wiring boards using standard PWB processing.

DuPont

How to Manage Material Outgassing in Reflow Oven

Technical Library | 2020-11-24 23:12:27.0

In a lead-free reflow process, temperatures are higher, and materials use outgasses more than in a leaded reflow process. The trends toward higher density populated boards and more pin-in-paste technology also increase solder paste use. More components and more solder paste result in more outgassing of chemistry during the reflow process. Some assemblies report condensation of vapors when the cold printed circuit board enters the oven. Little is known about the interaction between these condensed materials in terms of the interaction between these condensed materials and the reliability of the assembly. Apart from the question of reliability, a printed circuit board contaminated with a small film of residues after reflow soldering is not desirable.

Vitronics Soltec

Test Solution for Heatsinks in Power Electronics Applications

Technical Library | 2021-03-24 01:30:47.0

Power electronics technology is widely used in several areas, such as in the railways, automotive, electric vehicles, and renewable energy sectors. Some of these applications are safety critical, e.g., in the automotive domain. The heat produced by power devices must be efficiently dissipated to allow them to work within their operational thermal limits. Moreover ...

Politecnico di Torino

Dust removal in temperature and humidity Test Chamber (2/2)

Technical Library | 2019-05-21 00:21:26.0

Continue to talk about the dust removal from temperature humidity test chamber. Cleaning and maintenance: 1) Pls remove internal impurities inisde chamber before operation. 2) The power distribution room should be cleaned at least once a year, and the dust can be removed by vacuum cleaner. 3) The exterior chamber must also be cleaned more than once a year, which can be wiped with soapy water. Inspection and maintenance of humidifier: The water storage in humidifier should be replaced once a month to ensure clean water quality, humidifying water tray should be cleaned once a month to ensure smooth flow of water. The inspection of over-temperature protector:during the test: If the temperature is over 20 ℃ ~ 30 ℃ than the maximum value setted,the power supply of the heater will stop, the "OVERHEAT" overt-emperature warning light will automatically turn on but the fan is still in operation, if the equipment runs without operator around,the operator should check the over-temperature protector in advance to ensure wether it has been setted properly before start [wet ball over-temperature protector set to 120 ℃].

Symor Instrument Equipment Co.,Ltd

Design For Test Considerations For PCB Design

Technical Library | 2006-07-14 11:48:11.0

The perennial question in electronics design and manufacture is: "How do I design a printed circuit board (PCB) so that it can be properly tested?" To achieve this objective, there are a number of design-for-test (DFT) considerations and techniques. Some are major, others, minor. However, the total contributes to a highly effective PCB design so that testing procedures applied to a given design result in high 90 percent plus test coverage.

NexLogic Tech, Inc.


in circuit testing searches for Companies, Equipment, Machines, Suppliers & Information

Midwest Circuit Technology
Midwest Circuit Technology

Midwest Circuit Technology provides Carbide Router Bits and End Milling Cuters for use in PCB Depaneling equipment. We have over 35 years of supplying tools and machining experience in drilling, Routing, Test Fixture manufacture.

Manufacturer / Distributor

114 Barrington Town Square
Aurora, OH USA

Phone: 13309956900

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