Technical Library | 2019-07-10 23:36:14.0
Pockets of gas, or voids, trapped in the solder interface between discrete power management devices and circuit assemblies are, unfortunately, excellent insulators, or barriers to thermal conductivity. This resistance to heat flow reduces the electrical efficiency of these devices, reducing battery life and expected functional life time of electronic assemblies. There is also a corresponding increase in current density (as the area for current conduction is reduced) that generates additional heat, further leading to performance degradation.
Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2023-01-17 17:12:33.0
Reflowed indium metal has for decades been the standard for solder thermal interface materials (solder TIMs or sTIMs) in most high-performance computing (HPC) TIM1 applications. The IEEE Heterogeneous Integration Thermal roadmap states that new thermal interface materials solutions must provide a path to the successful application of increased total-package die areas up to 100cm2. While GPU architectures are relatively isothermal during usage, CPU hotspots in complex heterogeneously-integrated modules will need to be able to handle heat flux hotspots up to 1000W/cm2 within the next two years. Indium and its alloys are used as reflowed solder thermal interface materials in both CPU and GPU "die to lid/heat spreader" (TIM1) applications. Their high bulk thermal conductivity and proven long-term reliability suit them well for extreme thermomechanical stresses. Voiding is the most important failure mode and has been studied by x-ray. The effects of surface pretreatment, pressure during reflow, solder flux type/fluxless processing, and preform design parameters, such as alloy type, are also examined. The paper includes data on both vacuum and pressure (autoclave) reflow of sTIMs, which is becoming necessary to meet upcoming requirements for ultralow voiding in some instances.
Technical Library | 2021-12-31 06:55:24.0
Any air entrapment in the potting compound can result in air bubbles that may cause performance problems in the finished component. Potting under vacuum is therefore frequently required to prevent air entrapment, especially with the increasingly small and complex assemblies required in today's electronics
Technical Library | 2021-12-31 06:56:02.0
Any air entrapment in the potting compound can result in air bubbles that may cause performance problems in the finished component. Potting under vacuum is therefore frequently required to prevent air entrapment, especially with the increasingly small and complex assemblies required in today's electronics
Technical Library | 2021-07-28 18:35:13.0
The performance of electronic components is compromised by factors such as bubbles in the potting medium. Increasing numbers of applications – particularly in the automotive and electronics industries – therefore require completely bubble-free dispensing methods. This is where potting in a vacuum comes into focus. The widespread school of thought about this technology is that it is too complicated, too expensive and too slow. But a closer look shows that this view is incorrect. This is a mastered technology. As for costs, the calculation basis is key, since usually the potting and vacuum method is only considered after the required potting quality cannot be achieved reliably any other way. Under total cost of ownership assessments, higher system costs no longer play a key role, since component failure would result in much higher subsequent costs. And now there are proven solutions for high production volumes and/or shorter cycle times. This whitepaper explains when potting in a vacuum is ideal for your projects and what to be aware of.
Technical Library | 2024-09-02 18:48:58.0
The conversion to higher temperature "Lead Free" assembly reflow conditions has created an increased awareness that entrapped or absorbed moisture is a frequent root cause of thermally induced delamination at assembly reflow. There are two connected failure modes from entrapped moisture; incomplete resin cross-linking resulting in premature resin decomposition and also severe Z axis expansion from "explosive vaporization of the entrapped moisture at elevated temperatures at assembly reflow". Ultimately, both result in delamination failure. Other papers have shown the negative effects of entrapped moisture before lamination including delamination, red color, reduced thermal reliability and increased high speed signal loss. In this paper, various materials were tested for moisture sensitivity during lamination. Tests were performed at varying lamination conditions including a pre-vacuum step and "kiss" step. Pressure and cure temperature parameters were evaluated for minimizing or eliminating the effect of trapped moisture. Also included are the results of inner layer moisture removal baking conditions and their effect on peel strength and thermal reliability.
Technical Library | 2022-10-31 17:25:37.0
Mixed formulation solder alloys refer to specific combinations of Sn-37Pb and SAC305 (96.5Sn–3.0Ag–0.5Cu). They present a solution for the interim period before Pb-free electronic assemblies are universally accepted. In this work, the surfaces of mixed formulation solder alloys have been studied by in situ and real-time Auger electron spectroscopy as a function of temperature as the alloys are raised above the melting point. With increasing temperature, there is a growing fraction of low-level, bulk contaminants that segregate to the alloy surfaces. In particular, the amount of surface C is nearly _50–60 at. % C at the melting point. The segregating impurities inhibit solderability by providing a blocking layer to reaction between the alloy and substrate. A similar phenomenon has been observed over a wide range of (SAC and non-SAC) alloys synthesized by a variety of techniques. That solder alloy surfaces at melting have a radically different composition from the bulk uncovers a key variable that helps to explain the wide variability in contact angles reported in previous studies of wetting and adhesion. VC 2011 American Vacuum Society. [DOI: 10.1116/1.3584821]
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