Technical Library | 1999-05-07 08:53:21.0
This paper discusses the basic concepts and current state of development of EUV lithography (EUVL), a relatively new form of lithography that uses extreme ultraviolet (EUV) radiation with a wavelength in the range of 10 to 14 nanometer (nm) to carry out projection imaging. Currently, and for the last several decades, optical projection lithography has been the lithographic technique used in the high-volume manufacture of integrated circuits. It is widely anticipated that improvements in this technology will allow it to remain the semiconductor industry's workhorse through the 100 nm generation of devices. However, some time around the year 2005, so-called Next-Generation Lithographies will be required.
Technical Library | 2009-11-05 11:17:32.0
Head-in-pillow (HiP), also known as ball-and-socket, is a solder joint defect where the solder paste deposit wets the pad, but does not fully wet the ball. This results in a solder joint with enough of a connection to have electrical integrity, but lacking sufficient mechanical strength. Due to the lack of solder joint strength, these components may fail with very little mechanical or thermal stress. This potentially costly defect is not usually detected in functional testing, and only shows up as a failure in the field after the assembly has been exposed to some physical or thermal stress.
Technical Library | 2015-02-05 23:23:40.0
Ball grid arrays are the boon and bane of engineers and printed circuit board designers the world over. Their unparalleled pin density and low lead inductance are essential in today's high pin count, high frequency integrated circuits. However, that same pin density and unique interface create a challenge unique unto themselves. These challenges need to be faced head on since the ball grid array (BGA) is prevalent in modern PCBs. While there are entire textbooks that cover the topic of BGAs, their use and fanout techniques, the quick overview provided here offers an engineer a good starting point for improving BGA designs.
Technical Library | 2022-10-04 16:43:10.0
In this paper I will discuss the different methods and equipment used to detect counterfeit electronic parts, specifically integrated circuits as well as demonstrate some of the "red flags" that help to identify a part as being suspected counterfeit. We will begin with the initial receipt of the parts and the examination of the outer packaging, the basic visual inspection of the parts, the visual inspection and documentation at high magnification, permanency marking, blacktop test, scrape test, XRF (RoHS), decapsulation, X-ray, basic electrical testing, C-SAM, full function testing and limited function testing.
Technical Library | 2006-12-04 16:38:18.0
This paper will explore how test can be an integral part of manufacturing to assure High Reliability Products. We will discuss how test parameters and test techniques are effective in finding time zero vs. time dependent defects. Understanding of manufacturing processes in terms defect levels as well as defect types is very critical in defining test parameters, new test techniques and test alternatives. This ultimately can improve the yield, quality, and reliability. We will discuss the types of defects, time zero vs. time dependent defects, test parameters and effectiveness and new test techniques to find time dependent defects.
Technical Library | 2014-05-22 17:10:37.0
In this paper, the general solution model of Chou has been used to predict the integral enthalpies of mixing of liquid In-Sn-Zn ternary alloys in five selected sections, xIn/xSn = 0.15/0.85, 0.34/0.66, 0.50/0.50, 0.67/0.33 and 0.85/0.15. The other traditional models such as Kohler, Muggianu, Toop and Hillert are also included in calculations. Comparison with literature data was done and showed reasonable agreement with Toop and Hillert asymmetric models.
Technical Library | 2015-03-12 18:26:16.0
Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them with Package on Package (PoP), fine pitch CSP's, 01005 and last but not least reduced component to component spacing for active and passive components (...)This paper will discuss different layouts, assembly and material selections to reduce component to component spacing down to 100-125um (4-5mil) from today’s mainstream of 150-200um (6-8mil) component to component spacing.
Technical Library | 2017-04-06 16:50:56.0
Silicon photonics is an IC technology where data is transferred using light that is routed on the chip using optical waveguides (Figure 1). Silicon photonics is best known as a method to solve problems with high input/output bandwidth applications. For example, because of ever-growing bandwidth requirements in datacenters, the optical transmit and receive heads are being placed closer and closer to the board and the IC. But, designers also apply this technology to biosensors, medical diagnostics, and environmental monitoring. Regardless of the application, photonic ICs always need integration to electronic circuits and this results in unique challenges.
Technical Library | 2020-06-19 19:08:14.0
The designs of electronic devices and systems are being continuously improved by becoming smaller in size and faster in communication speed. The potential risk associated with these specific design improvements will be an increase in power density and, consequently, a greater risk of thermal problems and failures. At the same time, the prevailing use of circuit boards integrated with power devices such as motor controllers and drivers, light-emitting diode (LED) lighting modules, power supplies, and amplifiers, and regulators for TV, etc., drive to the use of a proper thermal management system while designing these kinds of printed circuit board (PCB).
Technical Library | 2021-05-20 13:41:30.0
Adoption and integration of USB-C chargers and hubs in automotive applications is driving a need for an updated approach to production tests due to USB-C's connector density, high bandwidth, and high power. We introduce a new paradigm in test-system development, micro-FCT (micro Functional Test), and demonstrate developing and deploying of an end-of-line (EOL) functional test-system which meets the strict automotive test requirements for a USB-C hub. Specification to deployment of the test-system was completed in less than 10-weeks, and test cycle time was 1/10th of the customer's requirements
