Technical Library | 2023-01-17 17:12:33.0
Reflowed indium metal has for decades been the standard for solder thermal interface materials (solder TIMs or sTIMs) in most high-performance computing (HPC) TIM1 applications. The IEEE Heterogeneous Integration Thermal roadmap states that new thermal interface materials solutions must provide a path to the successful application of increased total-package die areas up to 100cm2. While GPU architectures are relatively isothermal during usage, CPU hotspots in complex heterogeneously-integrated modules will need to be able to handle heat flux hotspots up to 1000W/cm2 within the next two years. Indium and its alloys are used as reflowed solder thermal interface materials in both CPU and GPU "die to lid/heat spreader" (TIM1) applications. Their high bulk thermal conductivity and proven long-term reliability suit them well for extreme thermomechanical stresses. Voiding is the most important failure mode and has been studied by x-ray. The effects of surface pretreatment, pressure during reflow, solder flux type/fluxless processing, and preform design parameters, such as alloy type, are also examined. The paper includes data on both vacuum and pressure (autoclave) reflow of sTIMs, which is becoming necessary to meet upcoming requirements for ultralow voiding in some instances.
Technical Library | 2017-07-21 03:23:47.0
1.Choose a feeder with best chip-placement ratio, install the Calibration Ruler on this feeder, then place feeder to calibration equipment’s position table.
Technical Library | 2019-06-07 14:49:54.0
ACI Technologies was contacted in regards to poor solder joint reliability. The customer submitted an assembly that was exhibiting intermittent opens at multiple locations on a ball grid array (BGA) component. The assembly’s functionality did not survive international shipping, essentially shock and vibration failures, immediately making the quality of the solder joints suspect. The customer was asked about the contract manufacturer and the reflow oven profile as well as the solder paste and surface finish used. The ACI engineering staff evaluated the contract manufacturer’s technique and determined that they were competent in the methods they used for placing thermocouples in the proper locations and developing the reflow oven profile. The surface finish was unusual, but not unheard of, in that it was hard gold over hard nickel, rather than electroless nickel immersion gold (ENIG). The customer was able to supply boundary scan testing data which showed a diagonal row of troublesome BGA pins.
Technical Library | 2019-05-31 14:21:59.0
Microelectronics is the manufacture of systems built from extremely small electronic components. In today’s electronic world, devices must be portable, equipped with wireless technology and are driven by size, weight, power, and cost (SWaP-C). These system level drivers are crucial to all current and future electronic applications from personal computers and cellular telephones to military-fielded hardware, biomedical instrumentation, and space-flight hardware.
Technical Library | 2019-05-21 17:31:39.0
In the field of electronics manufacturing, the end use of the product will always dictate the processes, procedures, and methods, not only for building the product, but also for testing, cleaning, and protecting the assembly in order to assure the level of quality required for proper operation. The need to protect an electronic assembly from its end use environment may stem from anyone of a number of hazardous (or potentially hazardous) conditions. Choosing the type of protective material is dependent upon matching that material’s characteristics with the conditions to be overcome. Naturally, the use of a protective (conformal) coating will require some method of verification to ensure the desired level and type of protection is achieved.
Technical Library | 2019-11-13 13:53:50.0
Fiber optic harnesses appear simple, but they have been designed to maintain all of the critical areas of aligning two fibers and minimize the losses associated with a break in the transmission path. In order to understand how the connectors overcome alignment issues, we must first understand the issues. Fiber optic communications networks use specific wavelengths of light (or colors) to transmit information through a clear fiber at high speed. They use the property of internal reflection along the fiber’s axis to contain the light and keep the optical power high enough to be detected at the receiving end.
Technical Library | 2019-05-21 17:38:55.0
Last month we presented Flip Chip Rework.As promised, this month we follow up with attachment techniques. Flip chip assembly is a key technology for advanced packaging of microelectronic circuits. It allows attachment of a bare chip to a packaging substrate in a face-down configuration, with electrical connections between the chip and substrate via conducting “bumps.” Flip chip technology was first invented by IBM for mainframe computer application in the early 1960s. Semiconductor devices are mounted face down and electrically and mechanically connected to a substrate (Figure 1). IBM called this manufacturing process a C4 process (controlled collapse chip connection).
Technical Library | 2019-05-21 17:34:08.0
Flip chip components have been gaining popularity in the electronics industry since their introduction in the 1960s. Advances in attach methods and adhesives, as well as the drive for smaller and faster electronic devices made the technology take off. The basic premise of the flip chip is that the chip (semiconductor device) is mounted flipped from the traditional position. The traditional method of mounting a die is to mount it on a lead frame with the circuit and bond pads face up. The bond pads then receive a bond wire which then connects to the proper lead on the lead frame. Flip chips are mounted face down onto a substrate using small bumps on the bond pads to make direct electrical connection to their respective pads on the substrate. Stay tuned for more information on attachment techniques next month. This article will focus on how to rework flip chips.
Technical Library | 2019-06-19 11:06:46.0
Tin (Sn) metal displays the characteristic of growing “tin whiskers” from pure tin coatings (most actively on relatively thin, electrodeposited or immersion tin coatings), usually months or years from the initial deposition of the tin. Tin whiskers are electrically conductive, filamentary, single crystals of white (beta phase) tin. These filaments of single crystal tin are usually one to five microns in diameter, and a few microns up to several tens of millimeters long, that grow spontaneously from the tin coatings. Alloying additions of several percent (by weight) of lead (Pb) prevents these electrically conductive tin whiskers from growing. Pb alloyed into the Sn was discovered to prevent the occurrence of tin whiskers in electronic assemblies in the 1950s as the Bell Laboratories solution to the problem of tin whiskers. The alloying of the tin with lead has thus quietly averted incalculable losses from short circuits in electronic equipment for the last 60 years.
Technical Library | 2019-09-16 09:41:02.0
“What is Virtual Manufacturing?” The simplest answer is a manufacturing simulation using a computer. The more complete answer is that virtual manufacturing is the process of designing a model of a real system and conducting experiments with this model for the purpose of understanding the behavior of the system. In today’s complex manufacturing environment, processes must be completely understood before implementation in order to “get it right the first time.” To achieve this goal, the use of a virtual environment is essential for simulating individual manufacturing processes and the total manufacturing system. By driving compatibility between the product design and the assembly plant process, these virtual tools enable the early optimization of cost, quality, and time to help achieve integrated products, process and resource design, and affordability.
