Technical Library | 2007-07-12 14:29:37.0
Over the last ten years, there have been a large number of publications describing work into lead free electronics soldering. They have come from all regions of the world and from academic organisations, individual companies and consortia. Although a number of these studies have culminated in "production trials", these have invariably been on a limited scale and they were essentially a demonstration, rather than the first step to implementation.
Technical Library | 2022-01-05 23:10:11.0
Waste electrical and electronic equipment or e-waste generation has been skyrocketing over the last decades. This poses waste management and value recovery challenges, especially in developing countries. Printed circuit boards (PCBs) are mainly employed in value recovery operations. Despite the high energy costs of generating crushed and milled particles of the order of several microns, those are employed in conventional hydrometallurgical techniques. Coarse PCB pieces (of order a few centimetres) based value recovery operations are not reported at the industrial scale as the complexities of the internal structure of PCBs limit efficient metal and non-metal separation.
Technical Library | 2013-08-29 19:52:43.0
Au over Ni on Cu is a widely used printed circuit board (PCB) surface finish, under bump metallization (UBM), and component lead metallization. It is generally accepted that less than 3 wt.% Au in Sn-Pb solder joints inhibits formation of detrimental intermetallic compounds (IMC). However, the critical limit for Au content in Pb-free solder joints is not well established. Three surface-mount package platforms, one with a matte Sn surface finish and the others with Ni/Au finish, were soldered to Ni/Au-finished PCB using Sn-3.0Ag 0.5Cu (SAC305) solder, in a realistic manufacturing setting. The assembled boards were divided into three groups: one without any thermal treatment, one subjected to isothermal aging at 125°C for 30 days, and the third group aged at 125°C for 56 days...
Technical Library | 2024-04-29 21:19:42.0
Over the years, computer vision and machine learning disciplines have considerably advanced the field of automated visual inspection for Printed Circuit Board (PCB-AVI) assurance. However, in practice, the capabilities and limitations of these advancements remain unknown because there are few publicly accessible datasets for PCB visual inspection and even fewer that contain images that simulate realistic application scenarios. To address this need, we propose a publicly available dataset, "FICS-PCB"1, to facilitate the development of robust methods for PCB-AVI. The proposed dataset includes challenging cases from three variable aspects: illumination, image scale, and image sensor. This dataset consists of 9,912 images of 31 PCB samples and contains 77,347 annotated components. This paper reviews the existing datasets and methodologies used for PCBAVI, discusses challenges, describes the proposed dataset, and presents baseline performances using feature engineering and deep learning methods for PCB component classification.
Technical Library | 2019-12-12 02:43:44.0
Today we discuss the reason that causes temperature humidity chamber to alarm,In most cases, the equipment alarm is caused by the improper operation in the process of use, which mainly includes following reasons:that are refrigeration system, temperature system and circulating system. First, Refrigeration system 1, refrigeration compressor overpressure alarm. If the refrigerant pressure exceeds the set value, it will stop and alarm at the same time. At this time, the fault must be eliminated and then manually reset. 2, short phase power supply, phase sequence alarm. When the external power supply of the equipment is out of phase or the phase sequence is changed, it will stop and alarm at the same time. 3. The circulating cooling water is short of water to alarm. When the water pressure of the cooling circulating water system is insufficient, it will stop and alarm at the same time, and it must wait for the fault to be eliminated and reset at the same time before it could run normally. 4, refrigeration compressor overheating alarm. When the coil of the compressor is overheated and the power supply of the line is not normal, it will stop and alarm at the same time. Second, Temperature system 1, the overtemperature alarm in the chamber. The sensors in the channel and the sample area are equipped with overtemperature protection devices, and there are also overtemperature protecter on the control panel. When the temperature in the working chamber exceeds the setting value on the controller, it will stop and alarm. 2. sample overtemperature protection. When the temperature in the sample area exceeds the protection temperature set by the controller, it will stop and alarm at the same time. The overtemperature protection of the sample is divided into upper limit protection and lower limit protection, which can be set according to the demand, Third,Circulating system 1. The alarm is caused by the overheating of the circulating fan. When the coil of the fan is over-heated, the alarm will be stopped at the same time. 2. The fan over-current alarm. When the current of the fan exceeds the allowable value, the alarm is stopped at the same time, and the normal operation can only be carried out after the fault maintenance of the overcurrent is completed. This is what we talk about today,if you have more questions,let us know.
Technical Library | 2015-08-20 15:18:38.0
Increasing system integration and component densities continue to significantly reduce the opportunity to access nets using standard test points. Over time the size of test points has been drastically reduced (as small as 0.5 mm in diameter) but current product design parameters have created space and access limitations that remove even the option for these test points. Many high speed signal lines have now been restricted to inner layers only. Where surface traces are still available for access, bead probe technology is an option that reduces test point space requirements as well as their effects on high speed nets and distributes mechanical loading away from BGA footprints enabling test access and reducing the risk of mechanical defects associated with the concentration of ICT spring forces under BGA devices. Building on Celestica's previous work characterizing contact resistance associated with Pr-free compatible surface finishes and process chemistry; this paper will describe experimentation to define a robust process window for the implementation of bead probe and similar bump technology that is compatible with standard Pb-free assembly processes. Test Vehicle assembly process, test methods and "Design of Experiments" will be described. Bead Probe formation and deformation under use will also be presented along with selected results.
Technical Library | 2017-03-02 18:13:05.0
The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed.
Technical Library | 2017-10-16 15:03:32.0
The miniaturization and advancement of electronic devices have been the driving force of design, research and development, and manufacturing in the electronic industry. However, there are some issues occurred associated with the miniaturization, for examples, warpage and reliability issues. In order to resolve these issues, a lot of research and development have been conducted in the industry and university with the target of moderate melting temperature solder alloys such as m.p. 280°C. These moderate temperature alloys have not resolve these issues yet due to the various limitations. YINCAE has been working on research and development of the materials with lower temperature soldering for higher temperature application. To meet this demand, YINCAE has developed solder joint encapsulant paste to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. This solder joint encapsulant paste can be used in typical lead-free profile and after reflow the application temperature can be up to over 300C, therefore it also eliminates red glue for double side reflow process. In this paper, we will discuss the reliability such as strength of solder joints, drop test performance and thermal cycling performance using this solder joint encapsulant paste in detail.
Technical Library | 2020-08-05 18:49:32.0
The evolution of internet-enabled mobile devices has driven innovation in the manufacturing and design of technology capable of high-frequency electronic signal transfer. Among the primary factors affecting the integrity of high-frequency signals is the surface finish applied on PCB copper pads – a need commonly met through the electroless nickel immersion gold process, ENIG. However, there are well-documented limitations of ENIG due to the presence of nickel, the properties of which result in an overall reduced performance in high-frequency data transfer rate for ENIG-applied electronics, compared to bare copper. An innovation over traditional ENIG is a nickel-less approach involving a special nano-engineered barrier designed to coat copper contacts, finished with an outermost gold layer. In this paper, assemblies involving this nickel-less novel surface finish have been subjected to extended thermal exposure, then intermetallics analyses, contact/sheet resistance comparison after every reflow cycle (up to 6 reflow cycles) to assess the prevention of copper atoms diffusion into gold layer, solder ball pull and shear tests to evaluate the aging and long-term reliability of solder joints, and insertion loss testing to gauge whether this surface finish can be used for high-frequency, high density interconnect (HDI) applications.
Technical Library | 2020-09-02 22:14:36.0
The demand for miniaturization and higher density electronic products has continued steadily for years, and this trend is expected to continue, according to various semiconductor technology and applications roadmaps. The printed circuit board (PCB) must support this trend as the central interconnection of the system. There are several options for fine line circuitry. A typical fine line circuit PCB product using copper foil technology, such as the modified semi-additive process (mSAP), uses a thin base copper layer made by pre-etching. The ultrathin copper foil process (SAP with ultrathin copper foil) is facing a technology limit for the miniaturization due to copper roughness and thickness control. The SAP process using sputtered copper is a solution, but the sputtering process is expensive and has issues with via plating. SAP using electroless copper deposition is another solution, but the process involved is challenged to achieve adequate adhesion and insulation between fine-pitch circuitries. A novel catalyst system--liquid metal ink (LMI)--has been developed that avoids these concerns and promotes a very controlled copper thickness over the substrate, targeting next generation high density interconnect (HDI) to wafer-level packaging substrates and enabling 5-micron level feature sizes. This novel catalyst has a unique feature, high density, and atomic-level deposition. Whereas conventional tin-palladium catalyst systems provide sporadic coverage over the substrate surface, the deposited catalyst covers the entire substrate surface. As a result, the catalyst enables improved uniformity of the copper deposition starting from the initial stage while providing higher adhesion and higher insulation resistance compared to the traditional catalysts used in SAP processes. This article discusses this new catalyst process, which both proposes a typical SAP process using the new catalyst and demonstrates the reliability improvements through a comparison between a new SAP PCB process and a conventional SAP PCB process.
