Technical Library | 2024-03-19 15:53:34.0
Underfill is a composite material usually made of an epoxy polymer that fills gaps between a chip and its carrier or a finished package and the PCB substrate to connect the chip to the board.
Technical Library | 2011-10-27 18:03:53.0
Leadless, near chip scale packages (LNCSP) like the quad flat pack no lead (QFN) are the fastest growing package types in the electronics industry today. Early LNCSPs were fairly straightforward components with small overall dimensions, a single outer row
Technical Library | 2006-10-02 14:26:47.0
This paper addresses the assembly and reliability of 0.5 mm pitch leadless Chip Scale Packages (CSP) on .062" immersion Ag plated printed circuit boards (PCB) using Pb-free solder paste. Four different leadless CSP designs were studied and each was evaluated using multiple PCB attachment pad designs.
Technical Library | 2007-06-06 15:25:30.0
Though today's microvias and high aspect plated through holes (PTH's) look nothing like the earliest through holes of 40 years ago, the PTH in its various forms remains the “weak link” and most critical element of printed wiring boards and laminate chip carriers (...) The paper outlines an approach to evaluating PTH reliability and quality that involves characterizing PTH life across a range of temperatures to reveal intricacies not seen by testing at a single delta-T, and certainly difficult to predict by modeling alone.
Technical Library | 2013-02-08 22:56:47.0
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.
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