Technical Library | 2021-05-06 13:41:55.0
Quality control is of vital importance during electronics production. As the methods of producing electronic circuits improve, there is an increasing chance of solder defects during assembling the printed circuit board (PCB). Many technologies have been incorporated for inspecting failed soldering, such as X-ray imaging, optical imaging, and thermal imaging. With some advanced algorithms, the new technologies are expected to control the production quality based on the digital images. However, current algorithms sometimes are not accurate enough to meet the quality control. Specialists are needed to do a follow-up checking. For automated X-ray inspection, joint of interest on the X-ray image is located by region of interest (ROI) and inspected by some algorithms. Some incorrect ROIs deteriorate the inspection algorithm.
Technical Library | 2014-12-11 18:00:09.0
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared
Technical Library | 2019-01-30 21:20:47.0
Due to the arrayed nature of the Computed Tomography (CT) Detector, high density area array interconnect solutions are critical to the functionality of the CT detector module. Specifically, the detector module sensor element, hereby known as the Multi-chip module (MCM), has a 544 position BGA area array pattern that requires precise test stimulation. A novel pogo-pin block array and corresponding motorized test socket has been designed to stimulate the MCM and acquire full functional test data. (...) This paper and presentation will focus on the socket design challenges and also key learnings from the design that can be applied to general test systems, including reliability testing. The secondary focus will be on the overall data collection and graphical user interface for the test equipment.
Technical Library | 2019-07-23 22:33:47.0
The Quad Flat Pack No Leads (QFN) style of leadless packaging [also known as a Land Grid Array (LGA)] is rapidly increasing in us e for wireless, automotive, telecom and many other areas becaus e of its low cost, low stand-off height and excellent thermal and electri cal properties. With the implementation of any new package type, there is always a learning curve for its use in design and processing as well as for the Process and Quality Engineers who have to get to grips with the challenges that these packages bring. Therefore, this paper will provide examples of the common process defects that can be seen with QFNs /LGAs when using optical and x-ray inspection as part of manufacturing quality control. Results of trials conducted on four PCB finishes and using vapour phase and convection reflow will be discussed.
Technical Library | 2021-12-16 01:48:41.0
Package-on-Package (PoP) technology is widely used in mobile devices due to its simple design, lower cost and faster time to market. Warpage characteristic and requirement of PoP package becomes critical to ensure both the top and bottom package can be mounted with minimal yield lost. With this challenge in placed, iNEMI has been working relentlessly to fingerprint the current PoP package technology warpage characteristic and to establish some key learning for packaging technologies. The work also extended to understand the basic requirement needed for successful PoP stacking by analyzing the warpage data obtained and formulate a simple analytical equation to explain the true warpage requirement for PoP packaging.
Technical Library | 2021-11-22 20:44:44.0
Many automated optical inspection (AOI) companies use supervised object detection networks to inspect items, a technique which expends tremendous time and energy to mark defectives. Therefore, we propose an AOI system which uses an unsupervised learning network as the base algorithm to simultaneously generate anomaly alerts and reduce labeling costs. This AOI system works by deploying the GANomaly neural network and the supervised network to the manufacturing system. To improve the ability to distinguish anomaly items from normal items in industry and enhance the overall performance of the manufacturing process, the system uses the structural similarity index (SSIM) as part of the loss function as well as the scoring parameters. Thus, the proposed system will achieve the requirements of smart factories in the future (Industry 4.0).
Technical Library | 2015-12-02 18:32:50.0
(Thermal Compression with Non-Conductive Paste Underfill) Method.The companies writing this paper have jointly developed Copper (Cu) Pillar micro-bump and TCNCP(Thermal Compression with Non-Conductive Paste) technology over the last two+ years. The Cu Pillar micro-bump and TCNCP is one of the platform technologies, which is essentially required for 2.5D/3D chip stacking as well as cost effective SFF (small form factor) package enablement.Although the baseline packaging process methodology for a normal pad pitch (i.e. inline 50μm) within smaller chip size (i.e. 100 mm2) has been established and are in use for HVM production, there are several challenges to be addressed for further development for commercialization of finer bump pitch with larger die (i.e. ≤50μm tri-tier bond pad with the die larger than 400mm2).This paper will address the key challenges of each field, such as the Cu trace design on a substrate for robust micro-joint reliability, TCNCP technology, and substrate technology (i.e. structure, surface finish). Technical recommendations based on the lessons learned from a series of process experimentation will be provided, as well. Finally, this technology has been used for the successful launching of the company FPGA products with SFF packaging technology.
Technical Library | 2018-03-05 11:17:31.0
In order to comply with RoHS and WEEE directives, many circuit assemblers are transitioning some or all of their soldering processes from tin-lead to lead-free within the upcoming year. There are no drop-in replacement alloys for tin-lead solder, which is driving a fundamental technology change. This change is forcing manufacturers to take a closer look at everything associated with the assembly process: board and component materials, logistics and materials management, solder alloys and processing chemistries, and even soldering methods. Do not expect a dramatic change in soldering behavior when moving to lead-free solders. The melting points of the alloys are higher, but at molten temperatures the different alloys show similar behaviors in a number of respects. Expect subtler changes, especially near the edges of a process window that is assumed based on tin-lead experience rather than defined through lead-free experimentation. These small changes, many of them yet to be identified and understood, will manifest themselves with lower assembly yields. The key to keeping yields up during the transition to lead-free is quickly learning what and where the subtle distinctions are, and tuning the process to accommodate them.
Technical Library | 2020-08-19 19:13:00.0
Commercially available health monitors rely on rigid electronic housing coupled with aggressive adhesives and conductive gels, causing discomfort and inducing skin damage. Also, research-level skin-wearable devices, while excelling in some aspects, fall short as concept-only presentations due to the fundamental challenges of active wireless communication and integration as a single device platform. Here, an all-in-one, wireless, stretchable hybrid electronics with key capabilities for real-time physiological monitoring, automatic detection of signal abnormality via deep-learning, and a long-range wireless connectivity (up to 15 m) is introduced. The strategic integration of thin-film electronic layers with hyperelastic elastomers allows the overall device to adhere and deform naturally with the human body while maintaining the functionalities of the on-board electronics. The stretchable electrodes with optimized structures for intimate skin contact are capable of generating clinical-grade electrocardiograms and accurate analysis of heart and respiratory rates while the motion sensor assesses physical activities. Implementation of convolutional neural networks for real-time physiological classifications demonstrates the feasibility of multifaceted analysis with a high clinical relevance. Finally, in vivo demonstrations with animals and human subjects in various scenarios reveal the versatility of the device as both a health monitor and a viable research tool.
Technical Library | 2023-06-12 18:33:29.0
This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.
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