Technical Library: loss (Page 1 of 6)

Signal Transmission Loss due to Copper Surface Roughness in High-Frequency Region

Technical Library | 2015-04-30 20:17:03.0

Higher-speed signal transmission is increasingly required on a printed circuit board to handle massive data in electronic systems. So, signal transmission loss of copper wiring on a printed circuit board has been studied. First, total signal loss was divided into dielectric loss and conductor loss quantitatively based on electromagnetic theory. In particular, the scattering loss due to surface roughness of copper foil has been examined in detail. And the usefulness of the copper foil with low surface roughness has been demonstrated.

Mitsui Kinzoku Group

Total Loss: How to Qualify Circuit Boards

Technical Library | 2011-05-12 19:04:05.0

We clarify the role of signal loss measurements, aka Total Loss, in specifying and qualifying circuit board materials for high-speed electronic design. We then demonstrate the NIST Multiline measurement technique in particular by characterizing test line

Connected Community Networks, Inc.

Influence of Copper Conductor Surface Treatment for High Frequency PCB on Electrical Properties and Reliability

Technical Library | 2019-02-13 13:45:11.0

Development of information and telecommunications network is outstanding in recent years, and it is required for the related equipment such as communication base stations, servers and routers, to process huge amount of data in no time. As an electrical signal becomes faster and faster, how to prevent signal delay by transmission loss is a big issue for Printed Circuit Boards (PCB) loaded on such equipments. There are two main factors as the cause of transmission loss; dielectric loss and conductor loss. To decrease the dielectric loss, materials having low dielectric constant and low loss tangent have been developed. On the other hand, reducing the surface roughness of the copper foil itself to be used or minimizing the surface roughness by modifying surface treatment process of the conductor patterns before lamination is considered to be effective in order to decrease the conductor loss. However, there is a possibility that reduction in the surface roughness of the conductor patterns will lead to the decrease in adhesion of conductor patterns to dielectric resin and result in the deterioration of reliability of PCB itself. In this paper, we will show the evaluation results of adhesion performance and electrical properties using certain type of dielectric material for high frequency PCB, several types of copper foil and several surface treatment processes of the conductor patterns. Moreover, we will indicate a technique from the aspect of surface treatment process in order to ensure reliability and, at the same time, to prevent signal delay at the signal frequency over 20 GHz.

MEC Company Ltd.

Cold Ball Pull Test Efficiency for the PCB Pad Cratering Validation with the Ultra Low Loss Dielectric Material

Technical Library | 2019-05-08 21:52:28.0

Cold ball pull testing is used to validate the resistance of PCB pad cratering for the different ultra-low loss dielectrics materials (Dk=3~4.2 and Df

iNEMI (International Electronics Manufacturing Initiative)

Organic Optical Waveguide Fabrication in a Manufacturing Environment

Technical Library | 2010-10-28 01:27:38.0

Optical waveguides based on organic materials have been fabricated in a laboratory environment but the scaling and manufacturing processes needed to produce these waveguides have been scant. The volume production of low loss organic waveguides in a conven

i3 Electronics

New Phosphorus-based Curing Agents for PWB

Technical Library | 2018-08-08 21:55:00.0

180 °C and Td >400 °C. In addition to a high thermal stability, Material A also shows a dielectric loss factor lower than commercial phosphorus-based flame retardants.

ICL-IP

Material & Process Influences on Conductive Anodic Filamentation (CAF)

Technical Library | 2023-03-16 19:07:51.0

HISTORY: * In the late 1970s an abrupt unpredictable loss of insulation resistance was observed in PCBs, which were subject to hostile climatic conditions of high relative humidity and temperature while having an applied voltage. * The loss of resistance, even leading to a short circuit was observed to be due to the growth of a subsurface filament from the anode to the cathode. * The term "Conductive Anodic Filamentation" (CAF) was coined.

Isola Group

High Frequency Dk and Df Test Methods Comparison High Density Packaging User Group (HDP) Project

Technical Library | 2019-02-06 22:02:08.0

The High Density Packaging (HDP) user group has completed a project to evaluate the majority of viable Dk (Dielectric Constant)/Df (Dissipation Factor) and delay/loss electrical test methods, with a focus on the methods used for speeds above 2 GHz. A comparison of test methods from 1 to 2 GHz through to higher test frequencies was desired, testing a variety of laminate materials (standard volume production with UL approval, low loss, and "halogen-free" laminate materials). Variations in the test board material resin content/construction and copper foil surface roughness/type were minimized. Problems with Dk/Df and loss test methods and discrepancies in results are identified, as well as possible correlations or relationships among these higher speed test methods.

Oracle Corporation

A Study of PCB Insertion Loss Variation in Manufacturing Using a New Low Cost Metrology

Technical Library | 2012-06-27 18:26:34.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. Signal integrity analysis has shown that printed circuit board (PCB) insertion loss is a key factor affecting high speed channel performance. Determining and controlling PCB inser

Intel Corporation

Origin and Quantification of Increased Core Loss in MnZn Ferrite Plates of a Multi-Gap Inductor

Technical Library | 2019-11-07 08:59:14.0

Inductors realized with high permeable MnZn ferrite require, unlike iron-powder cores with an inherent dis-tributed gap, a discrete air gap in the magnetic circuit to prevent saturation of the core material and/or tune the inductance value. This large discrete gap can be divided into several partial gaps in order to reduce the air gap stray field and consequently the proximity losses in the winding. The multi-gap core, realized by stacking several thin ferrite plates and inserting a non-magnetic spacer material between the plates, however, exhibits a substan-tial increase in core losses which cannot be explained from the intrinsic properties of the ferrite. In this paper, a comprehensive overview of the scientific literature regarding machining induced core losses in ferrite, dating back to the early 1970s, is provided which suggests that the observed excess core losses could be attributed to a deterioration of ferrite properties in the surface layer of the plates caused by mechanical stress exerted during machining.

Power Electronic Systems Laboratory (PES)

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