Technical Library | 2019-06-11 09:36:13.0
An experiment was recently performed ACI Technologies for a customer that was interested in comparing the wetting of lead-free solders with varying temperature profiles and atmospheric conditions. In order to deliver an objective measurement of solder wetting (in addition to subjective inspection analysis), a simple wetting indicator pattern was added to the solder stencil in an area on the test vehicle that had exposed and unused copper.
Technical Library | 2020-04-14 15:56:32.0
This paper will focus on the application requirements of solder printing small aperture designs, concentrating on 008004 (inch) / 0201 (metric) size components, and the results of a design of experiment printing these challenging apertures. As Moore's law continues to be applied to component miniaturization, the next installment of reduced packaging has arrived in the form of the 008004/0201 for resistors and capacitors. Component size roughly the size of a grain of sand presents specific challenges to the solder printing process. To address these challenges, each aspect of the printing process will need be examined. This includes essential machine requirements, including correct squeegee blades, tooling support, and calibrations, to meet the demanding specifications. The correct match and design of materials will be addressed, focusing on the stencil and substrate design along with solder paste and cleaning solvent requirements. A design of experiment will be reviewed that applies the machine and materials discussed, including the printer and Solder Paste Inspection (SPI) setup and the specific machine parameters used. The results of these DOE's will then be closely examined.
Technical Library | 2015-08-27 15:32:16.0
Ever since there has been a widespread usage of surface mount parts, the trend of continued shrinkage of devices with ever finer pitches has continued to challenge PCB assemblers for the rework of same. Todays' pitches are commonly 0.5 to 0.4mm with packages of tiny outline sizes, 5 -10mm square, making the rework of such devices a challenge. In addition to the handling and inspection challenges comes the board density. Spacing to neighboring components continues to be compressed so the rework techniques should not damage neighboring components.
Technical Library | 2018-03-07 22:41:05.0
This study investigates the scooping effect during solder paste printing as a function of aperture width, aperture length and squeegee pressure. The percent of the theoretical volume deposited depends on the PWB topography. A typical bimodal percent volume distribution is attributed to poor release apertures and large apertures, where scooping takes place, yielding percent volumes 100%. This printing experiment is done with a concomitant validation of the printing process using standard 3D Solder Paste Inspection (SPI) equipment.
Technical Library | 2023-05-22 17:46:29.0
Over the past several years, much research has been performed and published on the benefits of stencil nano-coatings and solvent under wipes. The process improvements are evident and well-documented in terms of higher print and end-of-line yields, in improved print volume repeatability, in extended under wipe intervals, and in photographs of the stencil's PCB-seating surface under both white and UV light. But quantifying the benefits using automated Solder Paste Inspection (SPI) methods has been elusive at best. SPI results using these process enhancements typically reveal slightly lower paste transfer efficiencies and less variation in print volumes to indicate crisper print definition. However, the improvements in volume data do not fully account for the overall improvements noted elsewhere in both research and in production.
Technical Library | 2015-06-11 21:20:29.0
The use of bottom terminated components (BTC) has become widespread, specifically the use of Quad Flat No-lead (QFN) packages. The small outline and low height of this package type, improved electrical and thermal performance relative to older packaging technology, and low cost make the QFN/BTC attractive for many applications.Over the past 15 years, the implementation of the QFN/BTC package has garnered a great amount of attention due to the assembly and inspection process challenges associated with the package. The difference in solder application parameters between the center pad and the perimeter pads complicates stencil design, and must be given special attention to balance the dissimilar requirements
Technical Library | 2021-08-04 18:46:25.0
The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.
Technical Library | 2018-09-26 20:33:26.0
Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.
Technical Library | 2023-05-02 18:50:24.0
Surface-mount PCB components are smaller than their lead-based counterparts and provide a radically higher component density. They are available in a variety of shapes and sizes designated by a series of standardized codes curated by the electronics industry. Of these PCB components, the 0201-sized are the smallest, measuring 0.024 x 0.012 in. (0.6 x 0.3 mm) – that's 70% smaller than the previous 0402 level! The 0201 components are designed to improve reliability in space-constrained applications such as portable electronics like smartphones, tablets, robotics and digital cameras, but require delicate handling during the assembly process. Given the miniaturized dimensions of an 0201 package, it is crucial that the mounting process abide by a series of guidelines regarding the design of the PCB mounting pads and solderable metallization, PCB circuit trace width, solder paste selection, package placement and overages, solder paste reflow, solder stencil screening, and final inspection. It's advisable that one review this information when procuring the services of a PCB assembler.
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