Technical Library | 2015-08-27 15:32:16.0
Ever since there has been a widespread usage of surface mount parts, the trend of continued shrinkage of devices with ever finer pitches has continued to challenge PCB assemblers for the rework of same. Todays' pitches are commonly 0.5 to 0.4mm with packages of tiny outline sizes, 5 -10mm square, making the rework of such devices a challenge. In addition to the handling and inspection challenges comes the board density. Spacing to neighboring components continues to be compressed so the rework techniques should not damage neighboring components.
Technical Library | 2013-06-20 14:33:12.0
With today's consumer technologies driving the need for denser and more compact devices, the assembly process for surface mounted devices has becoming increasingly more difficult. With the mixture of components requiring a broader range of print deposition volume, various techniques are in use in an attempt to ensure consistent and appropriate paste volume is achieved. Some of these techniques include step etching a stencil locally on a targeted device, promoting electroformed smooth wall nickel stencils, through to laser cutting newer grade stencil materials. This paper focuses on the relevant attributes that affect the properties of solder paste release and introduces the effects of surface free energy with respect to key elements that make up the stencil printing process.
Technical Library | 2019-06-03 21:07:34.0
The objective of this White Paper is to provide users of the above products in the electronics industry a clear understanding of the different types of stencil cleaning paper/fabrics that are currently available. Fine pitch applications are more the norm now and so the performance of stencil cleaning rolls is more critical than ever before. This White Paper will give solder paste stencil printing engineers and purchasing professionals an insight into the main products on the market, thereby enabling them to make informed decisions.
Technical Library | 2023-06-12 18:33:29.0
This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.
Technical Library | 2022-07-11 09:24:48.0
The change of squeegee pressure has a significant impact on printing. Too small pressure will make the solder paste unable to effectively reach the bottom of the stencil opening and not be well deposited on the pad. Too much pressure will cause tin The paste is printed too thin and can even damage the stencil.
Technical Library | 2021-11-17 18:53:50.0
The demand for product miniaturization, especially in the handheld device area, continues to challenge the board assembly industry. The desire to incorporate more functionality while making the product smaller continues to push board design to its limit. It is not uncommon to find boards with castle-like components right next to miniature components. This type of board poses a special challenge to the board assemblers as it requires a wide range of paste volume to satisfy both small and large components. One way to address the printing challenge is to use creative stencil design to meet the solder paste requirement for both large and small components. ... The most important attribute of a stencil is its release characteristic. In other words, how well the paste releases from the aperture. The paste release, in turn, depends on the surface characteristics of the aperture wall and stencil foil. The recent introduction of new technology, nano-coating for both stencil and squeegee blades, has drawn the attention of many researchers. As the name implies, nano-coated stencils and blades are made by a conventional method such as laser-cut or electroformed then coated with nano-functional material to alter the surface characteristics. This study will evaluate nano-coated stencils for passive component printing, including 01005.
Technical Library | 2017-09-28 16:36:33.0
These nano-coatings also refine the solder paste brick shape giving improved print definition. These two benefits combine to help the solder paste printing process produce an adequate amount of solder paste in the correct position on the circuit board pads. Today, stencil aperture area ratios from 0.66 down to 0.40 are commonly used and make paste printing a challenge. This paper presents data on small area ratio printing for component designs including 01005 Imperial (0402 metric) and smaller 03015 metric and 0201 metric chip components and 0.3 mm and 0.4 mm pitch micro BGAs.
Technical Library | 2023-05-22 16:42:56.0
Nano-coatings are applied to solder paste stencils with the intent of improving the solder paste printing process. Do they really make a noticeable improvement? The effect of Nano-coatings on solder paste print performance was investigated. Transfer efficiencies were studied across aperture sizes ranging from 0.30 to 0.80 area ratio. Also investigated were the effects of Nano-coatings on transfer efficiencies of tin-lead, lead-free, water soluble, no-clean, and type 3, 4, and 5 solder pastes. Solder paste print performance for each Nano-coating was summarized with respect to all of these variables.
Technical Library | 2018-03-15 07:23:35.0
The SMT assembly process is continuously challenged by the factors which enhance circuit board performance and limit productivity. The pick and place and reflow systems reflect these driven issues by adding more and more controls to their systems, but the fact is one of the age old processes continues to operate within the same rules since the dawn of the SMT assembly world: The SMT screen printing. (...)This paper showcases a new stencil process that was discovered by reverting to the basics:understanding the reason for each stencil material process, focusing on detailed finishes and a disciplined aperture design process, maintaining original designs, and making the correctly designed apertures to control the paste deposition. The test results drove us to focus the efforts on the aperture walls In this paper we will demonstrate with lab tests SMT process results howthe improved paste release results in improved SMT print process performance and its positive impact on SPI yields and EOL performance.
Technical Library | 2015-06-11 21:20:29.0
The use of bottom terminated components (BTC) has become widespread, specifically the use of Quad Flat No-lead (QFN) packages. The small outline and low height of this package type, improved electrical and thermal performance relative to older packaging technology, and low cost make the QFN/BTC attractive for many applications.Over the past 15 years, the implementation of the QFN/BTC package has garnered a great amount of attention due to the assembly and inspection process challenges associated with the package. The difference in solder application parameters between the center pad and the perimeter pads complicates stencil design, and must be given special attention to balance the dissimilar requirements
