Technical Library | 2023-06-12 19:18:24.0
As any new technology emerges, increasing levels of refinement are required to facilitate the mainstream implementation and continual improvement processes. In the case of lead-free processing, the initial hurdles of alloy and chemistry selection are cleared on the first level, providing a base process. The understanding gained from early work on the base process leads to the next level of refinement in optimizing the primary factors that influence yield. These factors may include thermal profiles, PWB surface finishes, component metallization, solder mask selection or stencil design.
Technical Library | 2019-08-14 22:20:55.0
Cleanliness is a product of design, including component density, standoff height and the cleaning equipment’s ability to deliver the cleaning agent to the source of residue. The presence of manufacturing process soil, such as flux residue, incompletely activated flux, incompletely cured solder masks, debris from handling and processing fixtures, and incomplete removal of cleaning fluids can hinder the functional lifetime of the product. Contaminates trapped under a component are more problematic to failure. Advanced test methods are needed to obtain "objective evidence" for removing flux residues under leadless components.Cleaning process performance is a function of cleaning capacity and defined cleanliness. Cleaning performance can be influenced by the PCB design, cleaning material, cleaning machine, reflow conditions and a wide range of process parameters.This research project is designed to study visual flux residues trapped under the bottom termination of leadless components. This paper will research a non-destructive visual method that can be used to study the cleanability of solder pastes, cleaning material effectiveness for the soil, cleaning machine effectiveness and process parameters needed to render a clean part.
Technical Library | 2021-09-15 19:00:35.0
This paper presents the use of physics of failure (PoF) methodology to infer fast and accurate lifetime predictions for power electronics at the printed circuit board (PCB) level in early design stages. It is shown that the ability to accurately model silicon–metal layers, semiconductor packaging, printed circuit boards (PCBs), and assemblies allows, for instance, the prediction of solder fatigue failure due to thermal, mechanical, and manufacturing conditions. The technique allows a lifecycle prognosis of the PCB, taking into account the environmental stresses it will encounter during the period of operation. Primarily, it involves converting an electronic computer aided design (eCAD) circuit layout into computational fluid dynamic (CFD) and finite element analysis (FEA) models with accurate geometries. From this, stressors, such as thermal cycling, mechanical shock, natural frequency, and harmonic and random vibrations, are applied to understand PCB degradation, and semiconductor and capacitor wear, and accordingly provide a method for high-fidelity power PCB modelling, which can be subsequently used to facilitate virtual testing and digital twinning for aircraft systems and sub-systems.
Technical Library | 2023-03-16 18:51:43.0
Conductive anodic filament (CAF) formation was first reported in 1976.1 This electrochemical failure mode of electronic substrates involves the growth of a copper containing filament subsurface along the epoxy-glass interface, from anode to cathode. Despite the projected lifetime reduction due to CAF, field failures were not identified in the 1980s. Recently, however, field failures of critical equipment have been reported.2 A thorough understanding of the nature of CAF is needed in order to prevent this catastrophic failure from affecting electronic assemblies in the future. Such an understanding requires a comprehensive evaluation of the factors that enhance CAF formation. These factors can be grouped into two types: (1) internal variables and (2) external influences. Internal variables include the composition of the circuit board material, and the conductor metallization and configuration (i.e. via to via, via to surface conductor or surface conductors to surface conductors). External influences can be due to (1) production and (2) storage and use. During production, the flux or hot air solder leveling (HASL) fluid choice, number and severity of temperature cycles, and the method of cleaning may influence CAF resistance. During storage and use, the principal concern is moisture uptake resulting from the ambient humidity. This paper will report on the relationship between these various factors and the formation of CAF. Specifically, we will explore the influences of printed wiring board (PWB) substrate choice as well as the influence of the soldering flux and HASL fluid choices. Due to the ever-increasing circuit density of electronic assemblies, CAF field failures are expected to increase unless careful attention is focused on material and processing choices.
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