Technical Library | 2001-04-24 10:44:24.0
This paper reviews the possible implementations of the Micro Via Technology within the Mentor Graphic's Board Station environment, specifically within the Librarian, Layout and Fablink applications. In this context, the definition of a Micro Via is constrained to Board Station’s support of such technology and contains only generalized descriptions of the manufacturing processes that require Micro Vias.
Technical Library | 2013-09-19 17:25:32.0
The next generation of smart phones will demand very thin multi-layer boards to reduce the product thickness again. This paper shows three different manufacturing approaches, which can be used for very thin any-layer build-ups. The technological approaches are compared on reliability level – the any-layer copper filled micro-via technology which is to be considered as state of the art technology for high end phones and the ALIVH-C/G technology that is well established in Japan. A test vehicle design featuring test coupons for comprehensive reliability test series has been defined as target application for investigation...
Technical Library | 2019-06-26 23:21:49.0
Copper-filled micro-vias are a key technology in high density interconnect (HDI) designs that have enabled increasing miniaturization and densification of printed circuit boards for the next generation of electronic products. Compared with standard plated through holes (PTHs) copper filled vias provide greater design flexibility, improved signal performance, and can potentially help reduce layer count, thus reducing cost. Considering these advantages, there are strong incentives to optimize the via filling process. This paper presents an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications which rapidly fills vias while minimizing surface plating.
Technical Library | 2023-01-10 20:15:42.0
Over the past years there has been consistent growth in the use of electroless nickel / immersion gold (ENIG) as a final finish. The finish is now frequently being used for PBGA, CSP, QFP and COB and more recently gathered considerable interest as a low cost under-bump metallization for flip chip bumping application. One of the largest users for this finish has been the telecommunication industry, were millions of square meters of PCBs with ENIG have been successfully used. The nickel layer offers advantages such as multiple soldering cycles and hand reworks without copper dissolution being a factor. The nickel also acts as a reinforcement to improve through-hole and blind micro via thermal integrity. In addition the nickel layer offers advantages such as co-planarity, Al-wire bondability and the use as contact surface for keypads or contact switching. Especially those pads, which are not covered by solder need a protective coating in corrosive environment – such as high humidity or pollutant gas.
Technical Library | 2019-07-17 17:56:34.0
The increased demand for electronic devices in recent years has led to an extensive research in the field to meet the requirements of the industry. Electrolytic copper has been an important technology in the fabrication of PCBs and semiconductors. Aqueous sulfuric acid baths are explored for filling or building up with copper structures like blind micro vias (BMV), trenches, through holes (TH), and pillar bumps. As circuit miniaturization continues, developing a process that simultaneously fills vias and plates TH with various sizes and aspect ratios, while minimizing the surface copper thickness is critical. Filling BMV and plating TH at the same time, presents great difficulties for the PCB manufactures. The conventional copper plating processes that provide good via fill and leveling of the deposit tend to worsen the throwing power (TP) of the electroplating bath. TP is defined as the ratio of the deposit copper thickness in the center of the through hole to its thickness at the surface. In this paper an optimization of recently developed innovative, one step acid copper plating technology for filling vias with a minimal surface thickness and plating through holes is presented.
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