Technical Library | 2023-08-04 15:38:36.0
The MicroLeadFrame® (MLF®)/Quad Flat No-Lead (QFN) packaging solution is extremely popular in the semiconductor industry. It is used in applications ranging from consumer electronics and communications to those requiring high reliability performance, such as the automotive industry. The wide acceptance of this packaging design is primarily due to its flexible form factors, size, scalability and thermal dissipation capabilities. The adaptation and acceptance of MLF/QFN packages in automotive high reliability applications has led to the development of materials and processes that have extended its capabilities to meet the performance and quality requirements. One of process developments that is enabling the success of the MLF/QFN within the automotive industry has been the innovation of side wettable flanks that provide the capability to inspect the package lead to printed circuit board (PCB) interfaces for reliable solder joints. Traditionally, through-board X-ray was the accepted method for detecting reliable solder joints for leadless packages. However, as PBC layer counts and routing complexities have increased, this method to detect well-formed solder fillets has proven ineffective and incapable of meeting the inspection requirements. To support increased reliability and more accurate inspection of the leadless package solder joints, processes to form side-wettable flanks have been developed. These processes enable the formation of solder fillets that are detectable using state-of-the-art automated optical inspection (AOI) equipment, providing increased throughput for the surface mount technology (SMT) processes and improved quality as well.
Technical Library | 2020-09-02 22:14:36.0
The demand for miniaturization and higher density electronic products has continued steadily for years, and this trend is expected to continue, according to various semiconductor technology and applications roadmaps. The printed circuit board (PCB) must support this trend as the central interconnection of the system. There are several options for fine line circuitry. A typical fine line circuit PCB product using copper foil technology, such as the modified semi-additive process (mSAP), uses a thin base copper layer made by pre-etching. The ultrathin copper foil process (SAP with ultrathin copper foil) is facing a technology limit for the miniaturization due to copper roughness and thickness control. The SAP process using sputtered copper is a solution, but the sputtering process is expensive and has issues with via plating. SAP using electroless copper deposition is another solution, but the process involved is challenged to achieve adequate adhesion and insulation between fine-pitch circuitries. A novel catalyst system--liquid metal ink (LMI)--has been developed that avoids these concerns and promotes a very controlled copper thickness over the substrate, targeting next generation high density interconnect (HDI) to wafer-level packaging substrates and enabling 5-micron level feature sizes. This novel catalyst has a unique feature, high density, and atomic-level deposition. Whereas conventional tin-palladium catalyst systems provide sporadic coverage over the substrate surface, the deposited catalyst covers the entire substrate surface. As a result, the catalyst enables improved uniformity of the copper deposition starting from the initial stage while providing higher adhesion and higher insulation resistance compared to the traditional catalysts used in SAP processes. This article discusses this new catalyst process, which both proposes a typical SAP process using the new catalyst and demonstrates the reliability improvements through a comparison between a new SAP PCB process and a conventional SAP PCB process.
