Technical Library | 2024-06-23 22:03:59.0
The melting temperatures of most lead-free solder alloys are somewhat higher than that of eutectic Sn/Pb solder, and many of the alloys tend to wet typical contact pads less readily. This tends to narrow down the fluxing and mass reflow process windows for assembly onto typical organic substrates and may enhance requirements on placement accuracy. Flip chip assembly here poses some unique challenges. The small dimensions provide for particular sensitivities to wetting and solder joint collapse, and underfilling does not reduce the demands on the intermetallic bond strength. Rather, the need to underfill lead to additional concerns in terms of underfill process control and reliability. Relatively little can here be learned from work on regular SMT components, BGAs or CSPs.
Technical Library | 2023-11-20 18:49:11.0
Non-destructive testing during the manufacture of printed wiring boards (PWBs) has become ever more important for checking product quality without compromising productivity. Using x-ray inspection, not only provides a non-destructive test but also allows investigation within optically hidden areas, such as the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips). As the size of components continues to diminish, today's x-ray inspection systems must provide increased magnification, as well as better quality x-ray images to provide the necessary analytical information. This has led to a number of x-ray manufacturers offering digital x-ray inspection systems, either as standard or as an option, to satisfy these needs. This paper will review the capabilities that these digital x-ray systems offer compared to their analogue counterparts. There is also a discussion of the various types of digital x-ray systems that are available and how the use of different digital detectors influences the operational capabilities that such systems provide.
Technical Library | 2016-11-30 21:30:50.0
Mid-chip solder balling is a defect typically associated with solder paste exhibiting poor hot slump and/or insufficient wetting during the reflow soldering process, resulting in paste flowing under the component or onto the solder resist. Once molten, this solder is compressed and forced to the side of the component, causing mid-chip solder balling.This paper documents the experimental work performed to further understand the impact on mid-chip solder balling from both the manufacturing process and the flux chemistry.
Technical Library | 2021-07-06 21:13:36.0
The surface finishes commonly used on printed circuit boards (PCBs) have an effect on solder paste performance in the surface mount process. Some surface finishes are non-planar like hot air solder level (HASL) which can lead to inconsistencies in solder paste printing. Other surface finishes are difficult to wet during reflow like organic solderability preservative (OSP). What is the overall effect of surface finish on solder paste performance? Which solder paste is best for each surface finish? It is the goal of this paper to answer these questions.
Technical Library | 2015-12-02 18:32:50.0
(Thermal Compression with Non-Conductive Paste Underfill) Method.The companies writing this paper have jointly developed Copper (Cu) Pillar micro-bump and TCNCP(Thermal Compression with Non-Conductive Paste) technology over the last two+ years. The Cu Pillar micro-bump and TCNCP is one of the platform technologies, which is essentially required for 2.5D/3D chip stacking as well as cost effective SFF (small form factor) package enablement.Although the baseline packaging process methodology for a normal pad pitch (i.e. inline 50μm) within smaller chip size (i.e. 100 mm2) has been established and are in use for HVM production, there are several challenges to be addressed for further development for commercialization of finer bump pitch with larger die (i.e. ≤50μm tri-tier bond pad with the die larger than 400mm2).This paper will address the key challenges of each field, such as the Cu trace design on a substrate for robust micro-joint reliability, TCNCP technology, and substrate technology (i.e. structure, surface finish). Technical recommendations based on the lessons learned from a series of process experimentation will be provided, as well. Finally, this technology has been used for the successful launching of the company FPGA products with SFF packaging technology.
Technical Library | 2022-06-27 16:50:26.0
Electronics industry is one of the fastest evolving, innovative, and most competitive industries. In order to meet the high consumption demands on electronics components, quality standards of the products must be well-maintained. Automatic optical inspection (AOI) is one of the non-destructive techniques used in quality inspection of various products. This technique is considered robust and can replace human inspectors who are subjected to dull and fatigue in performing inspection tasks. A fully automated optical inspection system consists of hardware and software setups. Hardware setup include image sensor and illumination settings and is responsible to acquire the digital image, while the software part implements an inspection algorithm to extract the features of the acquired images and classify them into defected and non-defected based on the user requirements. A sorting mechanism can be used to separate the defective products from the good ones. This article provides a comprehensive review of the various AOI systems used in electronics, micro-electronics, and opto-electronics industries. In this review the defects of the commonly inspected electronic components, such as semiconductor wafers, flat panel displays, printed circuit boards and light emitting diodes, are first explained. Hardware setups used in acquiring images are then discussed in terms of the camera and lighting source selection and configuration. The inspection algorithms used for detecting the defects in the electronic components are discussed in terms of the preprocessing, feature extraction and classification tools used for this purpose. Recent articles that used deep learning algorithms are also reviewed. The article concludes by highlighting the current trends and possible future research directions.
Technical Library | 2009-04-30 18:06:24.0
This presentation surveys the most significant via and via-related laminate failure mechanisms from past to present using data from current induced thermal cycling (CITC) testing, failure analysis, and other sources. The relative life and failure modes of thru vias, buried vias, and microvias (stacked vs. non-stacked) are compared, along with the affect of structure, materials, and peak temperatures on the above. The origin of via-induced laminate failures such as "eyebrow cracks" and Pb free related internal delamination is also explored.
Technical Library | 2019-05-21 00:21:26.0
Continue to talk about the dust removal from temperature humidity test chamber. Cleaning and maintenance: 1) Pls remove internal impurities inisde chamber before operation. 2) The power distribution room should be cleaned at least once a year, and the dust can be removed by vacuum cleaner. 3) The exterior chamber must also be cleaned more than once a year, which can be wiped with soapy water. Inspection and maintenance of humidifier: The water storage in humidifier should be replaced once a month to ensure clean water quality, humidifying water tray should be cleaned once a month to ensure smooth flow of water. The inspection of over-temperature protector:during the test: If the temperature is over 20 ℃ ~ 30 ℃ than the maximum value setted,the power supply of the heater will stop, the "OVERHEAT" overt-emperature warning light will automatically turn on but the fan is still in operation, if the equipment runs without operator around,the operator should check the over-temperature protector in advance to ensure wether it has been setted properly before start [wet ball over-temperature protector set to 120 ℃].
Technical Library | 2009-03-05 15:46:54.0
In a recent survey of 89 organizations conducted by Whataboutquality.com, respondents were asked what few key characteristics defined quality, in the eyes of their customer, the most popular response was: the product or service met my requirements. The next two most popular responses were: it worked like I expected and it was a good value, worth what I paid for it (...) So how do you continue to exceed customer expectations and simultaneously reduce costs? There are two paths to take. You can find and reduce the variation in your process and you can eliminate as much of the non-value-added waste in your operation.
Technical Library | 2015-07-21 13:50:37.0
Achieving an even coat at the right desired thickness is a major challenge when it comes to applying conformal coating to a Printed Circuit Board (PCB). Applying a coating too thin will ultimately render the electronic assembly vulnerable to potential environmental risks therefore defeating the purpose of the coating. Apply the coat too thick, and it could leave the electronic specific components non-functional therefore destroying the electronic assembly entirely. Coating thickness must meet quality specifications. Measurements for coating thickness may be taken while film is dry or wet. Once measurements are recorded, thickness is compared to quality specifications and fluid dispensing automation machinery is calibrated as necessary. There are a handful of methods for measuring conformal coating thickness that are commonly used in the Electronic Manufacturing Services (EMS) and Original Electronic Manufacturer (OEM) industries. A few commonly used methods for checking conformal coating thickness include:
