Technical Library: oper (Page 10 of 15)

Microspring Characterization and Flip-Chip Assembly Reliability

Technical Library | 2014-05-29 13:48:14.0

Electronics packaging based on stress-engineered spring interconnects has the potential to enable integrated IC testing, fine pitch, and compliance not readily available with other technologies. We describe new spring contacts which simultaneously achieve low resistance ( 30 μm) in dense 2-D arrays (180 ~ 180-µm pitch). Mechanical characterization shows that individual springs operate at approximately 150-µN force. Electrical measurements and simulations imply that the interface contact resistance contribution to a single contact resistance is This paper suggests that integrated testing and packaging can be performed with the springs, enabling new capabilities for markets such as multichip modules.

Institute of Electrical and Electronics Engineers (IEEE)

Advanced modelling technique achieves near to zero set up time and minimal tuning

Technical Library | 2015-04-29 03:29:56.0

Statistical Appearance Modelling technology enables an AOI system to “learn real world variation” based on operator interaction with inspection task results. This provides an accurate statistical description of normal variation in a product. With modelling technology, the user does not have to anticipate potential defects as the system will “flag” anything outside the “normal production range”. And, since the system is programmed with real production variation, it is sensitive to small subtle changes enabling reliable defect detection. Autonomous prediction of process variation enables an AOI system to be set up from a single PCB with production-ready performance. Setup time can be

CyberOptics Corporation

Looking Forward - Manufacturing Execution Systems for SME’s

Technical Library | 2015-12-14 13:40:04.0

A Manufacturing Execution System (MES) is a software program that manages and monitors production work in a factory. The MES controls and monitors all manufacturing data in real time, so there is no guesswork as to the status of any given job, machine, operator, etc. The focus is on short-interval scheduling (shift or day) with an emphasis on optimizing the distribution of work orders. Larger manufacturers have employed MES’s for years but many small to medium sized enterprises (SME’s) have yet to adopt such systems. The benefits of using an MES are many. Looking forward, I predict that even the smallest manufacturing companies will employ MES systems in the future.

Schleuniger, Inc.

Selective Reflow Rework Process

Technical Library | 2016-08-18 15:38:09.0

The Selective Reflow Rework Process is an approach to improving the high volume rework process, increasing process capabilities and process repeatability by using a standard reflow oven of 12 zones, pick and place machinery, semi-automated printing gear and Solder Paste Inspection (SPI) implementations. This approach was able to reduce the amount of rework equipment by more than half. Our human resource requirements (indirect and direct labor) were cut by more than 50% and our rolled throughput yield increased from 68.9% to 84.14%. The Selective Reflow Rework Process is less reliant upon operators and has become a repeatable, stable rework process.

Flex (Flextronics International)

IPC-CC-830B Versus the 'Real World'

Technical Library | 2016-09-22 17:52:59.0

Conformal Coatings are often used to increase the reliability of electronic assemblies operating in harsh or corrosive environments where the product would otherwise fail prematurely. Conformal coatings are often qualified to international standards, intended to enable users to better differentiate between suitable conformal coating chemistries, but always on a flat test coupon, which is not representative of real world use conditions. In order to better correlate international standards with real world-use conditions, three-dimensional Surface Insulation Resistance (SIR) test boards have been manufactured with dummy components representative of those commonly used on printed circuit assemblies...

Electrolube

How Mitigation Techniques Affect Reliability Results for BGAs

Technical Library | 2016-11-17 14:58:02.0

Since 2006 RoHS requirements have required lead free solders to take the place of tin-lead solders in electronics. The problem is that in some environments the lead free solders are less reliable than the older tin-lead solders. One of the ways to solve this problem is to corner stake, edge bond or underfill the components. When considering what mitigation technique and material to use, the operating conditions must be characterized. The temperature range is important when selecting a material to use since the glass transition temperature (Tg) and coefficient of thermal expansion (CTE) are important properties. If improperly chosen, the mitigation material can cause more failures than an unmitigated component.

DfR Solutions (acquired by ANSYS Inc)

Bare PCB inspection for Track cut, Track Short and Pad Damage using simple Image Processing Operations

Technical Library | 2021-05-06 13:48:05.0

In this paper most commonly occurring Bare PCB defects such as Track Cut, Track short and Pad Damages are detected by Image processing techniques. Reference PCB without having any defects is compared with test PCB having defects to identify the defects and x-y coordinates of the center of the defects along with radii are obtained using Difference of Gaussian method and location of the individual type of defects are marked either by similar color or different colors. Result Analysis includes time taken for the inspection of a single defect, multiple similar defects, and multiple different defects. Time taken is ranging from 1.674 to 1.714 seconds if the individual type of defects are marked by different colors and 0.670 to 0.709 seconds if all the identified defects are marked by the same colors.

Vidya Vikas Institute Of Engineering And Technology

Crimp Force Monitoring – The Recipe for Success

Technical Library | 2013-08-13 09:49:53.0

One of the common issues I’ve noticed when visiting shops that use crimp force monitors (CFMs) is that the CFMs are usually turned off, regardless of the brand, because engineers and operators are not using them properly. Why, with all of their benefits, are CFMs not being used regularly by employees? One of the biggest problems is the lack of understanding of the variables affecting the CFM’s ability to detect variations. Crimp quality detection is similar to baking a cake. There are a lot of ingredients and if one ingredient is missing or of bad quality, you likely are not going to achieve your desired result. This article will go back through the basics of a crimp quality detection system and discuss what ingredients or variables you need to consider before switching off that CFM.

Schleuniger, Inc.

A Printed Circuit Board Inspection System With Defect Classification Capability

Technical Library | 2013-08-15 13:12:11.0

An automated visual PCB inspection is an approach used to counter difficulties occurred in human’s manual inspection that can eliminates subjective aspects and then provides fast, quantitative, and dimensional assessments. In this study, referential approach has been implemented on template and defective PCB images to detect numerous defects on bare PCBs before etching process, since etching usually contributes most destructive defects found on PCBs. The PCB inspection system is then improved by incorporating a geometrical image registration, minimum thresholding technique and median filtering in order to solve alignment and uneven illumination problem. Finally, defect classification operation is employed in order to identify the source for six types of defects namely, missing hole, pin hole, underetch, short-circuit, mousebite, and open-circuit.

Universiti Teknologi Malaysia

A System Level Electrostatic Discharge Protection Modeling Methodology for Time Domain Analysis.

Technical Library | 2014-04-03 18:01:13.0

A system level modeling methodology is presented and validated on a simple case. It allows precise simulations of electrostatic discharge (ESD) stress propagation on a printed circuit board (PCB). The proposed model includes the integrated circuit (IC) ESD protection network, IC package, PCB lines, passives components, and externals elements. The impact of an external component on the ESD propagation paths into an IC is demonstrated. Resulting current and voltage waveforms are analyzed to highlight the interactions between all the elements of an operating PCB. A precise measurement technique was designed and used to compare with the simulation results. The model proposed in this paper is able to predict, with good accuracy, the propagation of currents and voltages into the whole system during ESD stress. It might be used to understand why failures occur and how to fix them with the most suitable solution.

Institute of Electrical and Electronics Engineers (IEEE)


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