Technical Library | 2009-09-18 14:52:06.0
Electronic assembly cleaning processes are becoming increasingly more complex because of global environmental mandates and customer driven product performance requirements. Manufacturing strategies today require process equivalence. That is to say, if a product is made or modified in different locations or processes around the world, the result should be the same. If cleaning is a requirement, will existing electronic assembly cleaning processes meet the challenge? Innovative cleaning fluid and cleaning equipment designs provide improved functionality in both batch and continuous inline cleaning processes. The purpose of this designed experiment is to report optimized cleaning process parameters for removing lead-free flux residues on populated circuit assemblies using innovative cleaning fluid and batch cleaning equipment designs.
Technical Library | 2007-11-29 17:20:31.0
Programs have been developed to predict the expected yield of flip chip assemblies, based on substrate design and the statistics of actual manufactured boards, as well as placement machine accuracy, variations in bump sizes, and possible substrate warpage. These predictions and the trends they reveal can be used to direct changes in design so that defect levels will fall below the acceptable limits. Shapes of joints are calculated analytically, or when this is not possible, numerically by means of a public domain program called Surface Evolver. The method is illustrated with an example involving the substrate for a flip chip BGA.
Technical Library | 2008-01-10 19:24:48.0
This research takes an in-depth look at the challenges encountered in developing a lead free wave soldering process based on the specific products as well as on specific materials. It attempts to provide the reader with the information necessary to make educated decisions in selecting materials and controlling various process parameters in order to execute a rational implementation strategy for a reliable and robust lead free wave soldering process.
Technical Library | 2008-02-04 12:13:38.0
Engineers are always striving to make a lighter, faster and stronger PCB. In order to achieve their designs, engineers must turn to alternative materials to enhance their designs. There are many materials that allow for thermal, coefficient of thermal expansion (CTE) and rigidity. Many times if a material enables an engineer to have CTE they will have to sacrifice thermal. Currently carbon composite laminates are being used in order to achieve an ideal PCB with thermal, CTE and rigidity with almost no weight premiums.
Technical Library | 2009-07-15 12:14:31.0
The increasing demand for smaller & smaller portable electrical devices is leading to the increasing usage of extremely small components in the SMT assembly lines. With the introduction of 01005 packages in mass production, all the different stages of the line are facing new challenges: from board design, through component placement to reflow process. Each stage introduces some specific types of defect which are considered impossible to repair due to the small size of the package. AOI has become an essential tool to enable good yield in the assembly of 01005.
Technical Library | 2014-03-20 12:37:39.0
In the beginning of SMT, Vapor Phase Soldering was the preferred reflow soldering technology because of its excellent heat transfer capabilities. There were also some disadvantages like fast temperature rise, nearly no influence on the temperature profiles and high costs. So the use of Vapor Phase Soldering was reduced to special applications with high mass or complex boards in low numbers (e.g. for military or aerospace use).
Technical Library | 2018-03-07 22:41:05.0
This study investigates the scooping effect during solder paste printing as a function of aperture width, aperture length and squeegee pressure. The percent of the theoretical volume deposited depends on the PWB topography. A typical bimodal percent volume distribution is attributed to poor release apertures and large apertures, where scooping takes place, yielding percent volumes 100%. This printing experiment is done with a concomitant validation of the printing process using standard 3D Solder Paste Inspection (SPI) equipment.
Technical Library | 2018-08-01 11:25:59.0
With complexities of PCB design scaling and manufacturing processes adopting to environmentally friendly practices raise challenges in ensuring structural quality of PCBs. This makes it essential to have a good 'Design for Test' (DFT) to ensure a robust structural test. (...)During the course of the DFT review, can we realize a good test strategy for the PCBA. How can the test strategy of the PCBA be partitioned as to what portions of the design can be covered structurally and what is covered functionally, in a way that provides best diagnostics to discover faults
Technical Library | 2019-11-26 15:57:27.0
The latest cellular communication technologies LTE-M and NB-IoT enable the introduction of a new generation of IoT devices that deliver on the promise of scalable, cost-effective massive IoT applications using LPWAN technology. However, a few key technology choices are necessary to create IoT devices that can support the multitude of existing and emerging massive IoT use cases..
Technical Library | 2013-02-08 22:56:47.0
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.
