Technical Library | 2013-03-28 16:18:22.0
For the last couple of years, the main concerns regarding the electrical performance of blank PCB boards were impedance and ohmic resistance. Just recently, the need to reduce insertion loss came up in discussions with blank board customers (...) The paper describes the test vehicle and the testing methodology and discusses in detail the electrical performance characteristics. The influence of the independent variables on the performance characteristics is presented. Finally the thermal reliability of the boards built applying different copper foils and oxide replacements was investigated.
Technical Library | 2014-10-16 16:39:12.0
Key points are: *Long-term storage of BGA & QFP products may be required due to: Fab and assembly factory transfers Product obsolescence requiring customers make lifetime/EOL purchases Providing extended service (10+ years) on vehicles Other program needs * Integrity of EOL products in terms of solderability needs to be verified.
Technical Library | 1999-05-07 08:50:40.0
To enable transistor scaling into the 21st century, new solutions such as high dielectric constaConventional scaling of gate oxide thickness, source/drain extension (SDE), junction depths, and gate lengths have enabled MOS gate dimensions to be reduced from 10mm in the 1970’s to a present day size of 0.1mm. To enable transistor scaling into the 21st century, new solutions such as high dielectric constant materials for gate insulation and shallow, ultra low resistivity junctions need to be developed. In this paper, for the first time, key scaling limits are quantified for MOS transistorsnt materials for gate insulation and shallow, ultra low resistivity junctions need to be developed.
Technical Library | 2012-12-14 14:28:20.0
This paper examines the potential failure mechanisms that can damage modern lowvoltage CMOS devices and their relationship to electrical testing. Failure mechanisms such as electrostatic discharge (ESD), CMOS latch-up, and transistor gate oxide degradation can occur as a result of electrical over-voltage stress (EOS). In this paper, EOS due to electrical testing is examined and an experiment is conducted using pulsed voltage waveforms corresponding to conditions encountered during in-circuit electrical testing. Experimental results indicate a correlation between amplitude and duration of the pulse waveform and device degradation due to one or more of the failure mechanisms.
Technical Library | 2014-07-31 16:36:59.0
Metal whiskers often grow across leads of electric equipment and electronic package causing current leakage or short circuits and raising significant reliability issues. The nature of metal whiskers remains a mystery after several decades of research. Here, the existence of metal whiskers is attributed to the energy gain due to electrostatic polarization of metal filaments in the electric field. The field is induced by surface imperfections: contaminations, oxide states, grain boundaries, etc. A proposed theory provides closed form expressions and quantitative estimates for the whisker nucleation and growth rates, explains the range of whisker parameters and effects of external biasing, and predicts statistical distribution of their lengths.
Technical Library | 2018-05-23 12:12:43.0
Driven by miniaturization, cost reduction and tighter requirements for electrical and thermal performance, the use of lead-frame based bottom-termination components (LF-BTC) as small-outline no-leads (SON), quad-flat no leads (QFN) packages etc., is increasing. However, a major distractor for the use of such packages in high-reliability applications has been the lack of a visible solder (toe) fillet on the edge surface of the pins: because the post-package assembly singulation process typically leaves bare copper leadframe at the singulation edge, which is not protected against oxidation and thus does not easily solder-wet, a solder fillet (toe fillet) does not generally develop.
Technical Library | 2014-03-06 19:04:07.0
Over the last few years, there has been an increase in the rate of Head-in-Pillow component soldering defects which interrupts the merger of the BGA/CSP component solder spheres with the molten solder paste during reflow. The issue has occurred across a broad segment of industries including consumer, telecom and military. There are many reasons for this issue such as warpage issues of the component or board, ball co-planarity issues for BGA/CSP components and non-wetting of the component based on contamination or excessive oxidation of the component coating. The issue has been found to occur not only on lead-free soldered assemblies where the increased soldering temperatures may give rise to increase component/board warpage but also on tin-lead soldered assemblies.
Technical Library | 2014-06-23 14:50:52.0
It was unusual to see chip terminations change colors when tin lead solders were used but with the introduction of lead free reflow soldering and the corresponding increases in reflow temperatures terminations are now changing colors. Two conditions are present when reflow temperatures are increased for lead free solder alloys that leads to discoloration. Reflow temperatures are above the melting point of tin (Sn MP is 232oC). Air temperatures commonly used in forced convection reflow systems are high enough to both melt the tin plating on the termination allowing it to be pulled into the solder joint due to solder joint liquid solder surface tension leaving behind the exposed nickel barrier. Now those metal oxide colors will be visible due to high air temperatures during reflow.
Technical Library | 2014-07-24 16:26:34.0
Wire bonding a die to a package has traditionally been performed using either aluminum or gold wire. Gold wire provides the ability to use a ball and stitch process. This technique provides more control over loop height and bond placement. The drawback has been the increasing cost of the gold wire. Lower cost Al wire has been used for wedge-wedge bonds but these are not as versatile for complex package assembly. The use of copper wire for ball-stitch bonding has been proposed and recently implemented in high volume to solve the cost issues with gold. As one would expect, bonding with copper is not as forgiving as with gold mainly due to oxide growth and hardness differences. This paper will examine the common failure mechanisms that one might experience when implementing this new technology.
Technical Library | 2021-06-07 19:10:16.0
The aim of this study was to compare leaching characteristics of metals from printed circuit boards (PCBs), taken from waste electrical and electronic equipment in the presence and in the absence of the iron-oxidizing bacteria, Acidithiobacillus ferrooxidans. A. ferrooxidans not only increases the leached concentration of Cu from the PCBs, but also inhibits the components of the 0K medium and leached Cu from forming precipitates such as libethenite (Cu2(PO4)(OH)), thereby assisting Cu recovery from the PCBs. In addition, the leached concentration of Pb from PCBs decreased in the presence of A. ferrooxidans, due to Pb forming amorphous precipitates. It is expected that Pb is not highly toxic to A. ferrooxidans. Consequently, A. ferrooxidans can be used as a cost-effective and environmentally friendly way to leach out valuable metals from PCBs as low-grade urban ore.
