Technical Library | 2019-01-08 02:00:27.0
Plastic ic tubes can be made of plastics of various materials such as PVC, PS, PET, PC, ABS, etc. The shipping tubes of different materials will have different performances. The characteristics of various materials and their packaging tubes are described in detail below;
Technical Library | 2011-10-06 13:59:04.0
The desire to have more functionality into increasingly smaller size end products has been pushing the PCB and IC Packaging industry towards High Density Interconnect (HDI) and 3D Packaging (stacked dies, embedded packaged components). Many companies in the high-end consumer electronics market place have been embedding passive chip components on inner PCB and IC Packages for a few years now. However, embedding packaged components on inner layers has remained elusive for the broader market due to lack of proper design tools and high cost of embedding components on inner layers (...) This paper will highlight several key industrialization aspects addressed in the frame of the European funded FP7 HERMES* project to build a manufacturing environment for products with embedded components. The program entered its third year and is now dealing with the manufacturing of functional demonstrators as an introduction to industrialization.
Technical Library | 2015-04-23 18:48:18.0
Smart phones are complex, costly devices and therefore need to be reworked correctly the first time. In order to meet the ever-growing demand for performance, the complexity of mobile devices has increased immensely, with more than a 70% greater number of packages now found inside of them than just a few years ago. For instance, 1080P HD camera and video capabilities are now available on most high end smart phones or tablet computers, making their production more elaborate and expensive. The printed circuit boards for these devices are no longer considered disposable goods, and their bill of materials start from $150.00, with higher end smart phones going up to $238.00, and tablets well over $300.00.
Technical Library | 2023-05-02 19:03:34.0
The demand for 0201 components in consumer products will increase sharply over the next few years due to the need for miniaturization. It is predicted that over 20 billion 0201 components will be used in more than one billion cell phones worldwide by the year 2003. Therefore, research and development on 0201 assembly is becoming a very hot topic. The first step to achieve a successful assembly process is to obtain a good PCB design for 0201 packages. This paper presents the data and criteria of PCB design for 0201 packages, including the pad design for 0201 components, and the minimum pad spacing or component clearance between 0201 components or between 0201 and other components. A systematic study on pad design and pad spacing was undertaken, using two test vehicles and three Design of Experiments (DOEs). In the first DOE, 2 out of 18 types of 0201 pad designs were selected based on process yield. The second DOE was focused on pad spacing, including 10mil, 8mil, 6mil and 4mil. The third experiment was final optimization, using two types of optimized pad designs with 10mil, 8mil and 6mil pad spacing. Through the above experiments, the design guideline for PCB layout for 0201 packages and the assembly process capability are identified.
Technical Library | 2018-05-23 12:12:43.0
Driven by miniaturization, cost reduction and tighter requirements for electrical and thermal performance, the use of lead-frame based bottom-termination components (LF-BTC) as small-outline no-leads (SON), quad-flat no leads (QFN) packages etc., is increasing. However, a major distractor for the use of such packages in high-reliability applications has been the lack of a visible solder (toe) fillet on the edge surface of the pins: because the post-package assembly singulation process typically leaves bare copper leadframe at the singulation edge, which is not protected against oxidation and thus does not easily solder-wet, a solder fillet (toe fillet) does not generally develop.
Technical Library | 2009-01-21 23:01:49.0
Over the last 10 years, the adoption of wafer-level packaging (WLP) has expanded to a wide range of semiconductor devices applied in a crosssection of industries from Automotive to Mobile Phone, Sensors to Medical Technology.
Technical Library | 2009-09-09 15:08:19.0
Stencil printing equipment has traditionally been used in the surface mount assembly industry for solder paste printing. In recent years the flexibility of the tool has been exploited for a wide range of materials and processes to aid semiconductor packaging and assembly. One such application has been the deposition of adhesive coatings onto the backside of silicon wafers.
Technical Library | 2007-06-13 13:44:10.0
Very high performance computer applications have created a demand for large organic substrates capable of interconnecting one or a few ASIC semiconductor devices with packaged memory devices. The electrical advantages offered by the use of a thin PTFE composite substrate were coupled with intrinsic mechanical advantages to create very high performance applications. The application development required interactions of design, fabrication, and new manufacturing technology to obtain rapid prototype production and allow a successful ensuing manufacturing ramp.
Technical Library | 2022-02-21 19:49:16.0
The ability to undertake non-destructive testing on semiconductor devices, during both their manufacture and their subsequent use in printed circuit boards (PCBs), has become ever more important for checking product quality without compromising productivity. The use of x-ray inspection not only provides a potentially non-destructive test but also allows investigation within optically hidden areas, such as the wire bonding within packages and the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips).
Technical Library | 2021-01-13 21:34:29.0
Package-on-Package (PoP) is a popular technology for fabricating chipsets of accelerated processing units. However, the coefficient of thermal expansion mismatch between Si chips and polymer substrates induces thermal warpage during the reflow process. As such, the reflow temperature and reliability of solder joints are critical aspects of PoP. Although Sne58Bi is a good candidate for low-temperature processes, its brittleness causes other reliability issues. In this study, an in-situ observation was performed on composite solders (CSs) made of ...
