Technical Library: pcb fabricator (Page 2 of 2)

Rigid-Flex PCB Right the First Time - Without Paper Dolls

Technical Library | 2017-01-19 16:58:47.0

The biggest problem with designing rigid-flex hybrid PCBs is making sure everything will fold in the right way, while maintaining good flex-circuit stability and lifespan. The next big problem to solve is the conveyance of the design to a fabricator who will clearly understand the design intent and therefore produce exactly what the designer/engineer intended.Rigid-Flex circuit boards require additional cutting and lamination stages, and more exotic materials in manufacturing and therefore the cost of re-spins and failures are very much higher than traditional rigid boards. To reduce the risk and costs associated with rigid-flex design and prototyping, it is desirable to model the flexible parts of the circuit in 3D CAD to ensure correct form and fit. In addition it is necessary to provide absolutely clear documentation for manufacturing to the fabrication and assembly houses.

Altium

Success Story of PCB Assembly Trend

Technical Library | 2016-08-04 10:34:35.0

With the onset of 1900’s, the novelty of printed circuits boards got started with a profound concept of constructing an electrical path on an isolated surface of a board. The initial trend of printed circuit board got into a vain to develop and upgrade the radios and gramophones. Gradually the notion of ‘Through Hole Technique’ came into picture to produce a double sided PCB. In mid 1990’s the idea of auto assembly process was introduced by PCB Manufacturer USA. This was a point of modern touch to enhance the fabrication process with automated soldering technique. The research and development picked up a pace for end to end electronic solutions for defense and US army.

4PCB Assembly

PTH Core-to-Core Interconnect Using Sintered Conductive Pastes

Technical Library | 2013-03-07 18:25:36.0

The market for high-layer-count printed circuit boards (PCB) containing blind and buried vias was once relatively small, and focused on specialized applications in the military and high end computing. The demand for these types of PCBs today is being driven by an increasing number of commercial applications in the telecommunications and semiconductor test market segments. These applications typically require high-aspect-ratio plated-through-holes (PTHs) and blind and buried vias in order to meet the applications interconnect density requirements. Blind and buried vias and high aspect ratio PTHs continue to present manufacturing challenges and frequently are the limiting features to achieving high fabrication yield... First published in the 2012 IPC APEX EXPO technical conference proceedings

Ormet Circuits, Inc.

How Detrimental Production Concerns Related to Solder Mask Residues Can Be Countered by Simple Operational Adaptations

Technical Library | 2019-09-19 00:28:48.0

The symbiotic relationship between solder masks and selective finishes is not new. The soldermask application is one of the key considerations to ensure a successful application of a selective finish. The selective finish is the final chemical step of the PCB manufacturing process, this is when the panels are at their most valuable and are unfortunately not re-workable. Imperfections are not tolerated, even if they are wholly cosmetic. Quality issues often manifest themselves in the form of a 'ping pong' conversation between the fabricators, the soldermask suppliers and the selective finish suppliers. Without tangible evidence these discussions are difficult to resolve and the selective finish process is usually regarded as responsible. This paper will focus on the chemical characteristics and use them to predict or identify potential issues before they occur rather than specifically name 'critical' soldermasks. It is also the intention of this paper to address the potential of a soldermask to react to common yield hiking practices like UV bumping and oven curing. It is hoped that this awareness will help fabricators to ensure maximum yields by asking the right questions. 'Critical’ soldermasks impact all selective finishes. In this paper, practical experience using immersion tin will be used to highlight the relationship between 'critical' soldermasks and some of the issues seen in the field. The paper will include a novel approach to identify re-deposited volatiles after the reflow.

Atotech

A System Level Electrostatic Discharge Protection Modeling Methodology for Time Domain Analysis.

Technical Library | 2014-04-03 18:01:13.0

A system level modeling methodology is presented and validated on a simple case. It allows precise simulations of electrostatic discharge (ESD) stress propagation on a printed circuit board (PCB). The proposed model includes the integrated circuit (IC) ESD protection network, IC package, PCB lines, passives components, and externals elements. The impact of an external component on the ESD propagation paths into an IC is demonstrated. Resulting current and voltage waveforms are analyzed to highlight the interactions between all the elements of an operating PCB. A precise measurement technique was designed and used to compare with the simulation results. The model proposed in this paper is able to predict, with good accuracy, the propagation of currents and voltages into the whole system during ESD stress. It might be used to understand why failures occur and how to fix them with the most suitable solution.

Institute of Electrical and Electronics Engineers (IEEE)

3D Printing Electronic Components And Circuits With Conductive Thermoplastic Filament

Technical Library | 2023-06-02 14:13:02.0

This work examines the use of dual-material fused filament fabrication for 3D printing electronic componentsand circuits with conductive thermoplastic filaments. The resistivity of traces printed fromconductive thermoplastic filaments made with carbon-black, graphene, and copper as conductive fillerswas found to be 12, 0.78, and 0.014 ohm cm, respectively, enabling the creation of resistors with valuesspanning 3 orders of magnitude. The carbon black and graphene filaments were brittle and fracturedeasily, but the copper-based filament could be bent at least 500 times with little change in its resistance.Impedance measurements made on the thermoplastic filaments demonstrate that the copper-based filamenthad an impedance similar to a copper PCB trace at frequencies greater than 1 MHz. Dual material3D printing was used to fabricate a variety of inductors and capacitors with properties that could bepredictably tuned by modifying either the geometry of the components, or the materials used to fabricatethe components. These resistors, capacitors, and inductors were combined to create a fully 3Dprinted high-pass filter with properties comparable to its conventional counterparts. The relatively lowimpedance of the copper-based filament enabled its use for 3D printing of a receiver coil for wirelesspower transfer. We also demonstrate the ability to embed and connect surface mounted components in3D printed objects with a low-cost ($1000 in parts), open source dual-material 3D printer. This work thusdemonstrates the potential for FFF 3D printing to create complex, three-dimensional circuits composedof either embedded or fully-printed electronic components.

A.T.E. Solutions, Inc.

Via Fill and Through Hole Plating Process with Enhanced TH Microdistribution

Technical Library | 2019-07-17 17:56:34.0

The increased demand for electronic devices in recent years has led to an extensive research in the field to meet the requirements of the industry. Electrolytic copper has been an important technology in the fabrication of PCBs and semiconductors. Aqueous sulfuric acid baths are explored for filling or building up with copper structures like blind micro vias (BMV), trenches, through holes (TH), and pillar bumps. As circuit miniaturization continues, developing a process that simultaneously fills vias and plates TH with various sizes and aspect ratios, while minimizing the surface copper thickness is critical. Filling BMV and plating TH at the same time, presents great difficulties for the PCB manufactures. The conventional copper plating processes that provide good via fill and leveling of the deposit tend to worsen the throwing power (TP) of the electroplating bath. TP is defined as the ratio of the deposit copper thickness in the center of the through hole to its thickness at the surface. In this paper an optimization of recently developed innovative, one step acid copper plating technology for filling vias with a minimal surface thickness and plating through holes is presented.

MacDermid Inc.

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Precision PCB Services, Inc
Precision PCB Services, Inc

Products, services, training & consulting for the assembly, rework & repair of electronic assemblies. BGA process experts. Manufacturers Rep, Distributor & Service Provider for Seamark/Zhuomao and Shuttle Star BGA Rework Stations.

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