Technical Library | 2020-05-26 22:28:56.0
Both the number and the variants of Ball Grid Array packages (BGAs) are tending to increase on network Printed Board Assemblies (PBAs)with sizes ranging from a few mm die size Wafer Level Packages (WLPs) with low ball count up to large multi-die System-in-Package (SiP) BGAs with 60-70 mm side lengths and thousands of I/Os.
Technical Library | 2015-02-05 23:23:40.0
Ball grid arrays are the boon and bane of engineers and printed circuit board designers the world over. Their unparalleled pin density and low lead inductance are essential in today's high pin count, high frequency integrated circuits. However, that same pin density and unique interface create a challenge unique unto themselves. These challenges need to be faced head on since the ball grid array (BGA) is prevalent in modern PCBs. While there are entire textbooks that cover the topic of BGAs, their use and fanout techniques, the quick overview provided here offers an engineer a good starting point for improving BGA designs.
Technical Library | 2016-08-02 06:10:56.0
As the technology has become a universal key to major developments, the marine and boat industry has shown elevated growth in recent time. The marine market circumscribes on the electronic and design solutions for every single innovation. All the developments in Marine sector has and are heading towards a notion of modernization and among these, printed circuit board is grounding the research and developments. How to increase the efficiency of the device? How to gain optimum fuel efficiency? Does the dual fuel concept become a buzz word for major innovations? These are the basic questions which are considered to bring new novelties in the market.
Technical Library | 2023-06-12 18:33:29.0
This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.
Technical Library | 2016-01-12 11:05:28.0
The electronic industry is currently very interested in low temperature soldering processes such as using Sn/Bi alloy to improve process yield, eliminate the head-in-pillow effect, and enhance rework yield. However, Sn/Bi alloy is not strong enough to replace lead-free (SAC) and eutectic Sn/Pb alloys in most applications. In order to improve the strength of Sn/Bi solder joints, enhance mechanical performance, and improve reliability properties such as thermal cycling performance of soldered electronic devices, YINCAE has developed a low temperature solder joint encapsulant for Sn/Bi soldering applications. This low temperature solder joint encapsulant can be dipped, dispensed, or printed. After reflow with Sn/Bi solder paste or alloy, solder joint encapsulant encapsulates the solder joint. As a result, the strength of solder joints is enhanced by several times, and thermal cycling performance is significantly improved. All details will be discussed in this paper.
Technical Library | 2019-05-01 23:18:27.0
Moisture can accelerate various failure mechanisms in printed circuit board assemblies. Moisture can be initially present in the epoxy glass prepreg, absorbed during the wet processes in printed circuit board manufacturing, or diffuse into the printed circuit board during storage. Moisture can reside in the resin, resin/glass interfaces, and micro-cracks or voids due to defects. Higher reflow temperatures associated with lead-free processing increase the vapor pressure, which can lead to higher amounts of moisture uptake compared to eutectic tin-lead reflow processes. In addition to cohesive or adhesive failures within the printed circuit board that lead to cracking and delamination, moisture can also lead to the creation of low impedance paths due to metal migration, interfacial degradation resulting in conductive filament formation, and changes in dimensional stability. Studies have shown that moisture can also reduce the glass-transition temperature and increase the dielectric constant, leading to a reduction in circuit switching speeds and an increase in propagation delay times. This paper provides an overview of printed circuit board fabrication, followed by a brief discussion of moisture diffusion processes, governing models, and dependent variables. We then present guidelines for printed circuit board handling and storage during various stages of production and fabrication so as to mitigate moisture-induced failures.
Technical Library | 2020-07-22 19:24:33.0
Recent advancements in electronic packaging and image processing techniques have opened the possibility for optics-based portable eye tracking approaches, but technical and safety hurdles limit safe implementation toward wearable applications. Here, we introduce a fully wearable, wireless soft electronic system that offers a portable, highly sensitive tracking of eye movements (vergence) via the combination of skin-conformal sensors and a virtual reality system. Advancement of material processing and printing technologies based on aerosol jet printing enables reliable manufacturing of skin-like sensors, while the flexible hybrid circuit based on elastomer and chip integration allows comfortable integration with a user's head. Analytical and computational study of a data classification algorithm provides a highly accurate tool for real-time detection and classification of ocular motions. In vivo demonstration with 14 human subjects captures the potential of the wearable electronics as a portable therapy system, whose minimized form factor facilitates seamless interplay with traditional wearable hardware.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Technical Library | 2023-05-02 19:06:43.0
As 0402 has become a common package for printed circuit board (PCB) assembly, research and development on mounting 0201 components is emerging as an important topic in the field of surface mount technology for PWB miniaturization. In this study, a test vehicle for 0201 packages was designed to investigate board design and assembly issues. Design of Experiment (DOE) was utilized, using the test vehicle, to explore the influence of key parameters in pad design, printing, pick-andplace, and reflow on the assembly process. These key parameters include printing parameters, mounting height or placement pressure, reflow ramping rate, soak time and peak temperature. The pad designs consist of rectangular pad shape, round pad shape and home-based pad shape. For each pad design, several different aperture openings on the stencil were included. The performance parameters from this experiment include solder paste height, solder paste volume and the number of post-reflow defects. By analyzing the DOE results, optimized pad designs and assembly process parameters were determined.
Technical Library | 2013-01-24 19:16:35.0
The electronics industry has mainly adopted the higher melting point Sn3Ag0.5Cu solder alloys for lead-free reflow soldering applications. For applications where temperature sensitive components and boards are used this has created a need to develop low melting point lead-free alloy solder pastes. Tin-bismuth and tin-bismuth-silver containing alloys were used to address the temperature issue with development done on Sn58Bi, Sn57.6Bi0.4Ag, Sn57Bi1Ag lead-free solder alloy pastes. Investigations included paste printing studies, reflow and wetting analysis on different substrates and board surface finishes and head-in-pillow paste performance in addition to paste-in-hole reflow tests. Voiding was also investigated on tin-bismuth and tin-bismuth-silver versus Sn3Ag0.5Cu soldered QFN/MLF/BTC components. Mechanical bond strength testing was also done comparing Sn58Bi, Sn37Pb and Sn3Ag0.5Cu soldered components. The results of the work are reported.
