Technical Library | 2018-08-03 14:37:59.0
In the electronics industry, the quality and reliability of any product is highly dependent upon the capabilities of the manufacturing suppliers. Manufacturing defects are one of the top reasons why companies fail to meet warranty expectations. These problems can result in severe financial pain and eventual loss of market share. What a surprising number of engineers and managers fail to realize is that focusing on processes addresses only part of the issue. Supplier selection also plays a critical role in the success or failure of the final product.
Technical Library | 2009-09-18 14:52:06.0
Electronic assembly cleaning processes are becoming increasingly more complex because of global environmental mandates and customer driven product performance requirements. Manufacturing strategies today require process equivalence. That is to say, if a product is made or modified in different locations or processes around the world, the result should be the same. If cleaning is a requirement, will existing electronic assembly cleaning processes meet the challenge? Innovative cleaning fluid and cleaning equipment designs provide improved functionality in both batch and continuous inline cleaning processes. The purpose of this designed experiment is to report optimized cleaning process parameters for removing lead-free flux residues on populated circuit assemblies using innovative cleaning fluid and batch cleaning equipment designs.
Technical Library | 2021-07-27 14:59:56.0
With increasing focus on reliability and miniaturized designs, Conductive Anodic Filament (CAF) as failure mechanism is gaining a lot of attention. Smaller geometries make the printed circuit board (PCB) susceptible to conductive anodic filament growth. Isola has carried out work to characterize the CAF susceptibility of various resin systems under different process and design conditions. Tests were carried out to determine the effect of various factors such as resin systems, glass finishes, voltage bias and hole and line spacings on the CAF resistance. This work was intended to provide information to the user on the suitability of various grades for specific end use applications. The focus of the work at Isola is to find the right combination of process and design conditions for improved CAF resistant products.
Technical Library | 2014-01-23 16:49:55.0
As reliability requirements increase, especially for defense and aerospace applications, the need to characterize components used in electronic assembly also increases. OEM and EMS companies look to perform characterizations as early as possible in the process to be able to limit quality related issues and improve both assembly yields and ultimate device reliability. In terms of BGA devices, higher stress conditions, RoHS compatible materials and increased package densities tend to cause premature failures in intermetallic layers. Therefore it is necessary to have a quantitative and qualitative test methodology to address these interfaces.
Technical Library | 1999-04-29 15:39:03.0
The paper describes the effects of a debridging knife on inerted soldering environments in an Electrovert Econopak wave solder machine. It reviews experiments to improve the purity of the soldering environment and results of the tests.
Technical Library | 2020-09-02 22:14:36.0
The demand for miniaturization and higher density electronic products has continued steadily for years, and this trend is expected to continue, according to various semiconductor technology and applications roadmaps. The printed circuit board (PCB) must support this trend as the central interconnection of the system. There are several options for fine line circuitry. A typical fine line circuit PCB product using copper foil technology, such as the modified semi-additive process (mSAP), uses a thin base copper layer made by pre-etching. The ultrathin copper foil process (SAP with ultrathin copper foil) is facing a technology limit for the miniaturization due to copper roughness and thickness control. The SAP process using sputtered copper is a solution, but the sputtering process is expensive and has issues with via plating. SAP using electroless copper deposition is another solution, but the process involved is challenged to achieve adequate adhesion and insulation between fine-pitch circuitries. A novel catalyst system--liquid metal ink (LMI)--has been developed that avoids these concerns and promotes a very controlled copper thickness over the substrate, targeting next generation high density interconnect (HDI) to wafer-level packaging substrates and enabling 5-micron level feature sizes. This novel catalyst has a unique feature, high density, and atomic-level deposition. Whereas conventional tin-palladium catalyst systems provide sporadic coverage over the substrate surface, the deposited catalyst covers the entire substrate surface. As a result, the catalyst enables improved uniformity of the copper deposition starting from the initial stage while providing higher adhesion and higher insulation resistance compared to the traditional catalysts used in SAP processes. This article discusses this new catalyst process, which both proposes a typical SAP process using the new catalyst and demonstrates the reliability improvements through a comparison between a new SAP PCB process and a conventional SAP PCB process.
Technical Library | 2023-08-04 15:38:36.0
The MicroLeadFrame® (MLF®)/Quad Flat No-Lead (QFN) packaging solution is extremely popular in the semiconductor industry. It is used in applications ranging from consumer electronics and communications to those requiring high reliability performance, such as the automotive industry. The wide acceptance of this packaging design is primarily due to its flexible form factors, size, scalability and thermal dissipation capabilities. The adaptation and acceptance of MLF/QFN packages in automotive high reliability applications has led to the development of materials and processes that have extended its capabilities to meet the performance and quality requirements. One of process developments that is enabling the success of the MLF/QFN within the automotive industry has been the innovation of side wettable flanks that provide the capability to inspect the package lead to printed circuit board (PCB) interfaces for reliable solder joints. Traditionally, through-board X-ray was the accepted method for detecting reliable solder joints for leadless packages. However, as PBC layer counts and routing complexities have increased, this method to detect well-formed solder fillets has proven ineffective and incapable of meeting the inspection requirements. To support increased reliability and more accurate inspection of the leadless package solder joints, processes to form side-wettable flanks have been developed. These processes enable the formation of solder fillets that are detectable using state-of-the-art automated optical inspection (AOI) equipment, providing increased throughput for the surface mount technology (SMT) processes and improved quality as well.
Technical Library | 2013-03-12 13:25:18.0
High density and miniaturized circuit assemblies challenge the solder paste printing process. The use of small components such as 0201, 01005 and μBGA devices require good paste release to prevent solder paste bridging and misalignment. When placing these miniaturized components, taller paste deposits are often required. To improve solder paste deposition, a nano-coating is applied to laser cut stencils to improve transfer efficiency. One concern is the compatibility of the nano-coating with cleaning agents used in understencil wipe and stencil cleaning. The purpose of this research is to test the chemical compatibility of common cleaning agents used in understencil wipe and stencil cleaning processes.Compatibility of Cleaning Agents With Nano-Coated Stencils
Technical Library | 2018-04-18 23:55:01.0
Higher functionality, higher performance and higher reliability with smaller real estate are the mantras of any electronic device and the future guarantees more of the same. In order to achieve the requirements of these devices, designs must incorporate fine line and via pitch while maintain good circuitry adhesion at a smooth plating-resin interface to improve signal integrity. The Semi-Additive Process (SAP) is a production-proven method used on low dielectric loss tangent (Df) build-up materials that enables the manufacture of ultra-fine circuitry. (...) This paper will discuss a new SAP process for low loss build-up materials with low desmear roughness (Ra= 40-100 nm) and excellent adhesion (610-680 gf/cm) at various processing conditions. Along with the process flow, the current work will also present results and a discussion regarding characterization on the morphology and composition of resin and/or metal plating surfaces using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX), surface roughness analysis, plating-resin adhesion evaluation from 90o peel tests
Technical Library | 2023-06-12 18:33:29.0
This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.
