Technical Library | 2023-01-17 17:35:07.0
After years of concentration on resolving productivity- related concerns such as increasing speed, consistency and throughput while reducing costs, many of the world's leading electronics manufacturers have added a new mandate to their agendas. They are seeking to minimize the environmental impacts of their assembly processes and final products without sacrificing the high levels of productivity and quality that have been achieved through decades of effort.
Technical Library | 2023-01-17 17:22:28.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC- 9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
Technical Library | 2023-01-17 18:04:51.0
As a manufacturing technology, SMT has acquired a "heritage" of widely accepted assumptions about its processes. However, yesterday'spractices are continually confronted by the shifting paradigms of today's production line.
Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2023-08-16 18:13:53.0
In one of our Consumer Electronics projects, a smart lighting company wished to dispense silicone-based LED encapsulation material for two different product sizes. The larger product had a 9mm circular dam which required silicone dispensing flush with the top of the dam. The smaller product had a 1mm LED die that required only the top to be encapsulated. The material consisted of two parts which were mixed by weight in a 1:1 ratio. A phosphor powder was added totaling 10% of the overall weight. The phosphor required agitation to remain suspended.
Technical Library | 2023-08-16 18:25:16.0
In one of our Consumer Electronics projects, a leader of networking technologies requested to test dispensing performance of a thermally conductive material, Fujipoly Sarcon SPG-50A. This material improves heat dissipation for higher frequency applications and reduces the negative effects of thermal resistance under heat, cold, humid, and thermal shock conditions. The customer's goal was to dispense a 1mm diameter dot with acceptable speed and consistency.
Technical Library | 2023-08-16 18:02:27.0
One of our customers in the medical industry requested dam and fill application testing on a Kapton substrate. The material needed to be non-conductive for dispensing around electrical components, acting as structural support. Ultimately the product will be folded, therefore the footprint had to be small.
Technical Library | 2010-11-24 20:47:38.0
As the electronics manufacturing and assembly industry in the US recovers to some degree from the economic crisis which began in 2008, the challenge of component shortages has risen to the top as one of the stumbling blocks for contract assemblers and cap
Technical Library | 2007-02-01 09:36:26.0
Purpose: Compare the Surface Insulation Resistance of reworked BGA Test samples made with standard solder balls using a flux only reattachment and samples made including the StencilQuik™ product from Best Inc. with solder balls using a flux only reattachment.
Technical Library | 2007-02-01 09:27:47.0
The purpose of the testing was to compare the resistance and check for open circuit conditions of reworked BGA test samples made with and without StencilQuik™ after 500 thermal shock cycles. StencilQuick™ is a product of Best Inc. In this series of tests, the resistance of daisy chain resistance patterns running between the BGA and test board after exposure to thermal shock was measured.
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