Technical Library: projecting (Page 5 of 7)

Lean Six Sigma Approach to New Product Development

Technical Library | 2017-08-02 20:18:21.0

In this rapidly moving electronics market, fast to market with new products is what separates top performing companies from average companies. A survey conducted by Arthur D. Little revealed that "New-Product Development (NPD) productivity in atop performing company is five times what it is in the average company. The top performer gets five times as much new product output for the same investment." What do they know that the rest of us do not? One winning factor is the use of the Robert Cooper process. (...)This paper will present a Lean Six Sigma approach to "right sizing" the Stage Gate process to be efficient, practical, and easy to manage. Various tools of Stage Gate, along with proven best practice, will be covered. In addition, a reduced Stage Gate model will be discussed for simple, low risk projects.

MacDermid Inc.

Rework of New High Speed Press Fit Connectors

Technical Library | 2019-06-06 00:19:02.0

More and more people and things are using electronic devices to communicate. Subsequently, many electronic products, in particular mobile base stations and core network nodes, need to handle enormous amounts of data per second. One important link in this communication chain is high speed pressfit connectors that are often used to connect mother boards and back planes in core network nodes. These new high speed pressfit connectors have several hundreds of thin, short and weak pins that are prone to damage. Small variations in via hole dimensions or hole plating thickness affect the connections; if the holes are too small, the pins may be bentor permanently deformed and if the holes are too large they will not form gas tight connections.The goal of this project was to understand how rework of these new high speed pressfit connectors affects connection strengths, hole wall deformations and plating cracks.

HDP User Group

Development of a Design & Manufacturing Environment for Reliable and Cost- Effective PCB Embedding Technology

Technical Library | 2011-10-06 13:59:04.0

The desire to have more functionality into increasingly smaller size end products has been pushing the PCB and IC Packaging industry towards High Density Interconnect (HDI) and 3D Packaging (stacked dies, embedded packaged components). Many companies in the high-end consumer electronics market place have been embedding passive chip components on inner PCB and IC Packages for a few years now. However, embedding packaged components on inner layers has remained elusive for the broader market due to lack of proper design tools and high cost of embedding components on inner layers (...) This paper will highlight several key industrialization aspects addressed in the frame of the European funded FP7 HERMES* project to build a manufacturing environment for products with embedded components. The program entered its third year and is now dealing with the manufacturing of functional demonstrators as an introduction to industrialization.

Cadence Design Systems, Inc.

iNEMI HFR-Free PCB Materials Team Project: An Investigation to Identify Technology Limitations Involved in Transitioning to HFR-Free PCB Materials

Technical Library | 2013-05-16 15:52:00.0

In response to a growing concern within the Electronic Industry to the transition to Halogen-Free laminates (HFR-Free) within the Client Market space (Desktop and Notebook computers) iNEMI initiated a HFR-Free Leadership Workgroup to evaluate the readiness of the Industry to make this transition. The HFR-Free Leadership WG concluded that the electronic industry is ready for the transition and that the key electrical and thermo-mechanical properties of the new HFR-Free laminates can meet the required criteria. The HFR-Free Leadership WG verified that the laminate suppliers can meet the capacity demands for these new HFR-Free laminates and developed a "Test Suite Methodology" (TSM) that can facilitate the comparison and choice of the right laminate to replace brominated FR4 in the Client space... First published in the 2012 IPC APEX EXPO technical conference proceedings.

Intel Corporation

iNEMI Pb-Free Alloy Characterization Project Report: Part II - Thermal Fatigue Results For Two Common Temperature Cycles

Technical Library | 2021-09-08 14:10:12.0

The Pb-Free Alloy Characterization Program sponsored by International Electronics Manufacturing Initiative (iNEMI) is conducting an extensive investigation using accelerated temperature cycling (ATC) to evaluate ball grid array (BGA) thermal fatigue performance of 12 commercial or developmental Sn based Pb-free solder alloys. This paper presents the initial findings from a specific subset of the temperature cycling test matrix. The focus is on comparing alloy performance for two of the most commonly specified temperature cycles, 0 to 100 °C and -40 to 125 °C.

iNEMI (International Electronics Manufacturing Initiative)

Techniques for Selective Soldering High Thermal Mass and Fine-Pitch Components

Technical Library | 2022-08-08 15:06:06.0

Selective soldering has evolved to become a standard production process within the electronics assembly industry, and now accommodates a wide variety of through-hole component formats in numerous applications. Most through-hole components can be easily soldered with the selective soldering process without difficulty however some types of challenging components require additional attention to ensure that optimum quality is maintained. Several high thermal mass components can place demands on the selective soldering process, while the use of specialized solder fixtures, or solder pallets, often places additional thermal demand on the preheating process. Fine-pitch through-hole components and connectors place a different set of demands on the selective soldering process and typically require special attention to lead projection and traverse speed to minimize bridging between adjacent pins. Dual in-line memory module (DIMM) connectors, compact peripheral component interface (cPCI) connectors, coax connectors and other high thermal mass components as well as fine-pitch microconnectors, can present challenges when soldered into backplanes or multilayer printed circuit board assemblies. Adding to this challenge, compact peripheral component interface connectors can present additional solderability issues because of their beryllium copper base metal pins. Key Terms: Selective soldering, drop-jet fluxing, sustained preheating, flux migration, adjacent clearance, lead-to-hole aspect ratio, lead projection, thermal reliefs, gold embrittlement, solderability testing.

Hentec Industries, Inc. (RPS Automation)

Maximal Performance Through Vacuum Potting

Technical Library | 2021-07-28 18:35:13.0

The performance of electronic components is compromised by factors such as bubbles in the potting medium. Increasing numbers of applications – particularly in the automotive and electronics industries – therefore require completely bubble-free dispensing methods. This is where potting in a vacuum comes into focus. The widespread school of thought about this technology is that it is too complicated, too expensive and too slow. But a closer look shows that this view is incorrect. This is a mastered technology. As for costs, the calculation basis is key, since usually the potting and vacuum method is only considered after the required potting quality cannot be achieved reliably any other way. Under total cost of ownership assessments, higher system costs no longer play a key role, since component failure would result in much higher subsequent costs. And now there are proven solutions for high production volumes and/or shorter cycle times. This whitepaper explains when potting in a vacuum is ideal for your projects and what to be aware of.

Scheugenpflug Inc.

Reliability Screening of Lower Melting Point Pb-Free Alloys Containing Bi

Technical Library | 2015-07-01 16:51:43.0

Aerospace and military companies continue to exercise RoHS exemptions and to intensively research the long term attachment reliability of RoHS compliant solders. Their products require higher vibration, drop/shock performance, and combined-environment reliability than the conventional SAC305 alloy provides. The NASA-DoD Lead-Free Electronics Project confirmed that pad cratering is one of the dominant failure modes that occur in various board level reliability tests, especially under dynamic loading. One possible route to improvement of the mechanical and thermo-mechanical properties of solder joints is the use of Pb-free solders with lower process temperatures. Lower temperatures help reduce the possibility of damaging the boards and components, and also may allow for the use of lower Tg board materials which are less prone to pad cratering defects. There are several Sn-Ag-Bi and Sn-Ag-Cu-Bi alloys which melt about 10°C lower than SAC305. The bismuth in these solder compositions not only reduces the melting temperature, but also improves thermo-mechanical behavior. An additional benefit of using Bi-containing solder alloys is the possibility to reduce the propensity to whisker growth

Honeywell International

IPC-1782 Standard for Traceability Supporting Counterfeit Components

Technical Library | 2018-01-04 11:05:34.0

Traceability has grown from being a specialized need for certain safety critical segments of the industry, to now being a recognized value-add tool for the industry as a whole. The perception of traceability data collection however persists as being a burden that may provide value only when the most rare and disastrous of events take place. Disparate standards have evolved in the industry, mainly dictated by large OEM companies in the market create confusion, as a multitude of requirements and definitions proliferate. The intent of the IPC-1782 project is to bring the whole principle and perception of traceability up to date. Traceability, as defined in this standard will represent the most effective quality tool available, becoming an intrinsic part of best practice operations, with the encouragement of automated data collection from existing manufacturing systems, integrating quality, reliability, predictive (routine, preventative, and corrective) maintenance, throughput, manufacturing, engineering and supply-chain data, reducing cost of ownership as well as ensuring timeliness and accuracy all the way from a finished product back through to the initial materials and granular attributes about the processes along the way.

Mentor Graphics

Screen Making for Printed Electronics- Specification and Tolerancing

Technical Library | 2018-03-28 14:54:36.0

Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.

Hazardous Print Consulting Inc


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