Technical Library: projecting (Page 6 of 7)

Cleaning Flux Residue under Leadless Components using Objective Evidence to Determine Cleaning Performance

Technical Library | 2019-08-14 22:20:55.0

Cleanliness is a product of design, including component density, standoff height and the cleaning equipment’s ability to deliver the cleaning agent to the source of residue. The presence of manufacturing process soil, such as flux residue, incompletely activated flux, incompletely cured solder masks, debris from handling and processing fixtures, and incomplete removal of cleaning fluids can hinder the functional lifetime of the product. Contaminates trapped under a component are more problematic to failure. Advanced test methods are needed to obtain "objective evidence" for removing flux residues under leadless components.Cleaning process performance is a function of cleaning capacity and defined cleanliness. Cleaning performance can be influenced by the PCB design, cleaning material, cleaning machine, reflow conditions and a wide range of process parameters.This research project is designed to study visual flux residues trapped under the bottom termination of leadless components. This paper will research a non-destructive visual method that can be used to study the cleanability of solder pastes, cleaning material effectiveness for the soil, cleaning machine effectiveness and process parameters needed to render a clean part.

KYZEN Corporation

Autonomous Driving - New systems to optimally apply potting media

Technical Library | 2019-10-17 08:44:01.0

There has been an increase in sealing and encapsulation applications mainly in the field of autonomous driving. Safety and assistance systems already make driving safer and more comfortable today. With increasing progress even more electronic systems will be added. The smooth functioning of computers, sensors, cameras, etc. - and thus our safety as road users - also depends on optimally applied potting media. These can be applied economically, quickly and with high quality in individual applications and are now mastered. With the changing mobility concepts, however, the prerequisites in manufacturing are changing. The requirements are often not fixed at the outset, but only develop during the course of the project. The aim here is to generate a flexible standard that enables attractive pricing and short delivery times. However, we are prepared for these developments: with our modular system consisting of scalable system modules. From this, individual processes can be taken and combined according to requirements. Our new LiquiPrep systems have recently become part of this modular system. They represent a further development of the proven A310 product family and enable reliable processing and conveying of self-levelling media. In addition to a significantly more intuitive operation, the LiquiPrep systems also offer higher performance thanks to a new, patented membrane pump and an optimized agitator. Image: Optimally applied sealants and casting materials form the basis for high quality and smooth functioning of the components.

Scheugenpflug Inc.

Solutions for Selective Soldering of High Thermal Mass and Fine-Pitch Components

Technical Library | 2020-05-07 03:46:27.0

The selective soldering process has evolved to become a standard production process within the electronics assembly industry, and now accommodates a wide variety of through-hole component formats in numerous applications. Most through-hole components can be easily soldered with the selective soldering process without difficulty, however some types of challenging components require additional attention to ensure optimum quality control is maintained. Several high thermal mass components can place demands on the selective soldering process, while the use of specialized solder fixtures and/or pallets often places an additional thermal demand on the preheating process. Fine-pitch through-hole components and connectors place a different set of demands on the selective soldering process and typically require special attention to lead projection and traverse speed to minimize bridging between adjacent pins. Dual in-line memory module (DIMM) connectors, compact peripheral component interface (cPCI) connectors, coax connectors and other high thermal mass components as well as fine-pitch microconnectors,can present challenges when soldered into backplanes or multilayer printed circuit board assemblies. Adding to this challenge, compact peripheral component interface connectors can present additional solderability issues due to their beryllium copper termination pins.

SELECT Products | Nordson Electronics Solutions

A Theoretical Framework for Industry 4.0 and Its Implementation with Selected Practical Schedules

Technical Library | 2021-06-02 19:34:48.0

In recent years, there has been dynamic changes in the industrial environment as a result of further innovations called Industry 4.0 (I.4.0), especially in the field of digital technology and manufacturing. Despite numerous examples of the implementation of Industry 4.0 in enterprises, there is no general framework for the implementation of Industry 4.0 with a detailed schedule. Researching the ways of implementing Industry 4.0 is still a current and unexplored area of research. The main aim of the paper is to present the concept of the theoretical framework for Industry 4.0 implementation based on selected schedules of the Industry 4.0 implementation. The paper was based on information from literature review and analysis of pilot enterprise projects to Industry 4.0 (case study) that were conducted in selected enterprises. The paper presents the key components of the framework of Industry 4.0 and the basic stage of implementing the concept in the enterprises, paying attention to their sequence and time frames. The proposed approach is dedicated to researchers and practitioners who implement the concept of Industry 4.0 in enterprises

Silesian University of Technology

Startling Results From Reliability Testing

Technical Library | 2009-03-13 00:27:09.0

Open product reliability testing in Stockholm, Sweden in January as part of a live production event generated some quite startling results. It was apparent that many components simply cannot handle the high reflow temperatures of a lead-free soldering process, and that many surface-mount machine suppliers are battling significant problems with QFN packages and other components that are mounting edgeways (bill boarding). However, some suppliers have achieved good results.

Mycronic Technologies AB

Effects of an Appropriate PCB Layout and Soldering Nozzle Design on Quality and Cost Structure in Selective Soldering Processes

Technical Library | 2009-10-29 11:45:52.0

The globalization of markets results in stronger competition with clearly noticeably cost pressure. For companies producing electronic equipment it is therefore of existential importance to reduce production costs whilst maintaining a consistently high quality level of the manufactured products. Manual repair soldering that is expensive, time-consuming and cost intensive is already unacceptable due to the required quality and the reproducibility of the whole manufacturing process.

SEHO Systems GmbH

High Frequency DK and DF Test Methods Comparison High Density Packaging User Group (HDP) Project

Technical Library | 2016-03-24 17:37:09.0

Today's Electronic Industry is changing at a high pace. The root causes are manifold. So world population is growing up to eight billions and gives new challenges in terms of urbanization, mobility and connectivity. Consequently, there will raise up a lot of new business models for the electronic industry. Connectivity will take a large influence on our lives. Concepts like Industry 4.0, internet of things, M2M communication, smart homes or communication in or to cars are growing up. All these applications are based on the same demanding requirement – a high amount of data and increased data transfer rate. These arguments bring up large challenges to the Printed Circuit Board (PCB) design and manufacturing.This paper investigates the impact of different PCB manufacturing technologies and their relation to their high frequency behavior. In the course of the paper a brief overview of PCB manufacturing capabilities is be presented. Moreover, signal losses in terms of frequency, design, manufacturing processes, and substrate materials are investigated. The aim of this paper is, to develop a concept to use materials in combination with optimized PCB manufacturing processes, which allows a significant reduction of losses and increased signal quality.

Alcatel-Lucent

Conductive Anodic Filament Failure: A Materials Perspective

Technical Library | 2023-03-16 18:51:43.0

Conductive anodic filament (CAF) formation was first reported in 1976.1 This electrochemical failure mode of electronic substrates involves the growth of a copper containing filament subsurface along the epoxy-glass interface, from anode to cathode. Despite the projected lifetime reduction due to CAF, field failures were not identified in the 1980s. Recently, however, field failures of critical equipment have been reported.2 A thorough understanding of the nature of CAF is needed in order to prevent this catastrophic failure from affecting electronic assemblies in the future. Such an understanding requires a comprehensive evaluation of the factors that enhance CAF formation. These factors can be grouped into two types: (1) internal variables and (2) external influences. Internal variables include the composition of the circuit board material, and the conductor metallization and configuration (i.e. via to via, via to surface conductor or surface conductors to surface conductors). External influences can be due to (1) production and (2) storage and use. During production, the flux or hot air solder leveling (HASL) fluid choice, number and severity of temperature cycles, and the method of cleaning may influence CAF resistance. During storage and use, the principal concern is moisture uptake resulting from the ambient humidity. This paper will report on the relationship between these various factors and the formation of CAF. Specifically, we will explore the influences of printed wiring board (PWB) substrate choice as well as the influence of the soldering flux and HASL fluid choices. Due to the ever-increasing circuit density of electronic assemblies, CAF field failures are expected to increase unless careful attention is focused on material and processing choices.

Georgia Institute of Technology

Comparison of ROSE, C3/IC, and SIR as an effective cleanliness verification test for post soldered PCBA

Technical Library | 2023-04-17 21:17:59.0

The purpose of this paper is to evaluate and compare the effectiveness and sensitivity of different cleanliness verification tests for post soldered printed circuit board assemblies (PCBAs) to provide an understanding of current industry practice for ionic contamination detection limits. Design/methodology/approach – PCBAs were subjected to different flux residue cleaning dwell times and cleanliness levels were verified with resistivity of solvent extract, critical cleanliness control (C3) test, and ion chromatography analyses to provide results capable of differentiating different sensitivity levels for each test. Findings – This study provides an understanding of current industry practice for ionic contamination detection using verification tests with different detection sensitivity levels. Some of the available cleanliness monitoring systems, particularly at critical areas of circuitry that are prone to product failure and residue entrapment, may have been overlooked. Research limitations/implications – Only Sn/Pb, clean type flux residue was evaluated. Thus, the current study was not an all encompassing project that is representative of other chemistry-based flux residues. Practical implications – The paper provides a reference that can be used to determine the most suitable and effective verification test for the detection of ionic contamination on PCBAs. Originality/value – Flux residue-related problems have long existed in the industry. The findings presented in this paper give a basic understanding to PCBA manufacturers when they are trying to choose the most suitable and effective verification test for the detection of ionic contamination on their products. Hence, the negative impact of flux residue on the respective product's long-term reliability and performance can be minimized and monitored effectively.

Jabil Circuit, Inc.

A Study on Effects of Copper Wrap Specifications on Printed Circuit Board Reliability

Technical Library | 2021-07-20 20:02:29.0

During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.

NASA Office Of Safety And Mission Assurance

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