Technical Library | 2020-11-24 23:01:04.0
The miniaturization trend is driving industry to adopting low standoff components or components in cavity. The cost reduction pressure is pushing telecommunication industry to combine assembly of components and electromagnetic shield in one single reflow process. As a result, the flux outgassing/drying is getting very difficult for devices due to poor venting channel. This resulted in insufficiently dried/burnt-off flux residue. For a properly formulated flux, the remaining flux activity posed no issue in a dried flux residue for no-clean process. However, when venting channel is blocked, not only solvents remain, but also activators could not be burnt off. The presence of solvents allows mobility of active ingredients and the associated corrosion, thus poses a major threat to the reliability. In this work, a new halogen-free no-clean SnAgCu solder paste, 33-76-1, has been developed. This solder paste exhibited SIR value above the IPC spec 100 MΩ without any dendrite formation, even with a wet flux residue on the comb pattern. The wet flux residue was caused by covering the comb pattern with 10 mm × 10 mm glass slide during reflow and SIR testing in order to mimic the poorly vented low standoff components. The paste 33-76-1 also showed very good SMT assembly performance, including voiding of QFN and HIP resistance. The wetting ability of paste 33-76-1 was very good under nitrogen. For air reflow, 33-76-1 still matched paste C which is widely accepted by industry for air reflow process. The above good performance on both non-corrosivity with wet flux residue and robust SMT process can only be accomplished through a breakthrough in flux technology.
Technical Library | 2020-10-08 01:01:01.0
Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations
Technical Library | 2022-12-19 18:59:51.0
Material and Process Characterization studies can be used to quantify the harmful effects that might arise from solder flux and other process residues left on external surfaces after soldering. Residues present on an electronic assembly can cause unwanted electrochemical reactions leading to intermittent performance and total failure. Components with terminations that extend underneath the package can trap flux residue. These bottom terminated components are flush with the bottom of the device and can have small solderable terminations located along the perimeter sides of the package. The clearance between power and ground render high electrical forces, which can propagate electrochemical interactions when exposed to atmospheric moisture (harsh environments). The purpose of this research is to predict and understand the functional performance of residues present under single row QFN component packages. The objective of the research study is to develop and collect a set of guidelines for understanding the relationship between ionic contamination and electrical performance of a BTC component when exposed to atmospheric moisture and the trade-offs between electrical, ionic contamination levels, and cleanliness. Utilizing the knowledge gained from undertaking the testing of QFN components and associated DOE, the team will establish a reference Test Suite and Test Spec for cleanliness.
Technical Library | 2021-11-26 14:34:07.0
The use of desiccant bags filled with Silica Sand and or Clay beads used in conjunction with a Moisture Barrier Bag to control moisture for storage of printed circuit boards has long been an accepted practice and standard from both JEDEC and IPC organizations. Additionally, the use heated ovens for baking off moisture using the evaporation process has also been a long#2;standing practice from these organizations. This paper on alternative drying methods will be accompanied by completed independent, unbiased tests conducted by Vinny Nguyen, an engineering student (now graduated) from San Jose State University. The accompanied paper will examine the performance levels of different technologies of desiccant bags to control moisture in enclosed spaces. The tests and equipment set were reviewed by an engineer and consultant to the Lockheed Martin Aerospace Division and the IPC - TM-650 2.6.28 test method was review by engineer from pSemi. The tests were designed to mimic performance tests outlined in Mil Spec 3464, which both IPC and JEDEC have adopted for their respective standards. The test examined variables including absorption capacity rates, weight gain and release of moisture back into the enclosed area. The presentation will also address and highlight: • Similarities of PCBs and Heavy Equipment as it applies to Inspections, Causes of Failure, Types of Corrosion and Moisture Collection Points. • Performance Attributes of Different Desiccant Technologies as it applies to shape, texture, change outs, labeling and regeneration. • Venn Diagram of Electromechanical Failure with the circles 1. Current 2. Contamination 3. Humidity Presentation Available
Technical Library | 2017-04-13 16:14:27.0
The drive to reduced size and increased functionality is a constant in the world of electronic devices. In order to achieve these goals, the industry has responded with ever-smaller devices and the equipment capable of handling these devices. The evolution of BGA packages and leadless devices is pushing existing technologies to the limit of current assembly techniques and materials.As smaller components make their way into the mainstream PCB assembly market, PCB assemblers are reaching the limits of Type 3 solder paste, which is currently in use by most manufacturers.The goal of this study is to determine the impact on solder volume deposition between Type 3, Type 4 and Type 5 SAC305 alloy powder in combination with stainless steel laser cut, electroformed and the emerging laser cut nano-coated stencils. Leadless QFN and μBGA components will be the focus of the test utilizing optimized aperture designs.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Technical Library | 2019-04-11 06:04:49.0
With the development of science and technology, the climatic chamber quality has been improved, and the failure rate is reduced, but there still have the failure probability.today we introduce what are the mian factors for big noise high low temperature test chamber: 1.External factors: the bottom angle is uneven, the ground is uneven, adjust the bottom angle, ensure the equipment is in a horizontal position; 2.The equipment is touched other objects or pushed against the wall,pls remove the objects and keep a certain distance from the wall. 3.Compressor noise:check whether the compressor collides with the pipeline,and evaporator dish is loose or not. 4.Check whether compressor shock absorbers are aging and replace them. 5.Solenoid valve noise: solenoid valve reversing caue loud sound, pls add damping glue, if no effect, need to replace solenoid valve. If there is AC noise, need to replace the power board. 6.Check wether the fan or the fan string shaft make noise,whether the fan blades are touched and deformed, whether the fan is fixed or not, pls adjust accordingly or add the rubber pad. If further technical questions,contact us without hesitation!---Climtest Symor® technical team
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