Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2001-05-23 16:36:43.0
Consultant R. Michael Donovan writes that manufacturers need to become more nimble and much faster in their order-to-delivery process. Mike discusses the implications of push vs. pull, IT tools as enablers and potential benefits from Demand-based Flow Manufacturing.
Technical Library | 2009-01-21 23:01:49.0
Over the last 10 years, the adoption of wafer-level packaging (WLP) has expanded to a wide range of semiconductor devices applied in a crosssection of industries from Automotive to Mobile Phone, Sensors to Medical Technology.
Technical Library | 2015-10-08 17:40:35.0
With the push for ever improving performance on semiconductor component I/O interfaces, semiconductor components are being driven into a realm which makes them more sensitive to electrostatic discharge, potentially increasing in sensitivity by 50% every 3-5 years. Today, the majority of modern day semiconductor components are being designed to meet 250Volts of charge device model sensitivity, and that could decrease to 125Volts in the next 3-5 years, and could again decrease to 50Volts-70Volts in the following 3-5 years. The entire electronics industry must prepare for this challenge.
Technical Library | 2009-06-17 18:52:27.0
The increased interest in halogen-free assemblies is a result of Non-Government Organizations (NGOs) exerting pressure on electronic equipment manufacturers to eliminate halogens. The NGOs primary focus is on resolving global environmental issues and concerns. As a result of an increase in the enormous "e-waste" dump sites that have begun showing up around the world, NGOs are pushing consumer electronic manufacturers to ban halogen-containing material in order to produce "green" products. Not only are these sites enormous, but the recycling methods are archaic and sometimes even illegal.This stockpiling and dumping has created growing political and environmental issues. In order to deal with this issue, the question of why halogens are a focal point must be addressed.
Technical Library | 2017-04-13 16:14:27.0
The drive to reduced size and increased functionality is a constant in the world of electronic devices. In order to achieve these goals, the industry has responded with ever-smaller devices and the equipment capable of handling these devices. The evolution of BGA packages and leadless devices is pushing existing technologies to the limit of current assembly techniques and materials.As smaller components make their way into the mainstream PCB assembly market, PCB assemblers are reaching the limits of Type 3 solder paste, which is currently in use by most manufacturers.The goal of this study is to determine the impact on solder volume deposition between Type 3, Type 4 and Type 5 SAC305 alloy powder in combination with stainless steel laser cut, electroformed and the emerging laser cut nano-coated stencils. Leadless QFN and μBGA components will be the focus of the test utilizing optimized aperture designs.
Technical Library | 2011-10-06 13:59:04.0
The desire to have more functionality into increasingly smaller size end products has been pushing the PCB and IC Packaging industry towards High Density Interconnect (HDI) and 3D Packaging (stacked dies, embedded packaged components). Many companies in the high-end consumer electronics market place have been embedding passive chip components on inner PCB and IC Packages for a few years now. However, embedding packaged components on inner layers has remained elusive for the broader market due to lack of proper design tools and high cost of embedding components on inner layers (...) This paper will highlight several key industrialization aspects addressed in the frame of the European funded FP7 HERMES* project to build a manufacturing environment for products with embedded components. The program entered its third year and is now dealing with the manufacturing of functional demonstrators as an introduction to industrialization.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Technical Library | 2015-08-06 19:17:53.0
Fine pitch/fine feature solder paste printing in PCB assembly has become increasingly difficult as board geometries have become ever more compact. The printing process itself, traditionally the source of 70% of all assembly defects, finds its process window narrowing. The technology of metal blade squeegees, with the aid of new materials, understanding, and settings such as blade angle, has kept pace with all but the smallest applications, e.g., 200μ - .50 AR and 150μ - .375 AR, which have been pushing blade printing technology to its limits. Enclosed media print head technology has existed, and has been under increasing development, as an alternative to metal squeegee blade printing. Until recently, the performance of enclosed print heads had been comparable to the very best metal squeegees, but advances in enclosed print media technology have now made it a superior alternative to squeegee blades in virtually all applications.
Technical Library | 2016-07-14 18:21:29.0
Printed Circuit Boards (PCBs) and Printed Electronics (PE) both describe conductor/substrate combinations that make connections. Both PCB and PE technologies have been in use for a long time in one form or another with PCBs currently the standard for complex, high speed electronics and PE for user interface, complex form factor or other film based applications. New and innovative applications create the opportunity for promising structures. Taking advantage of the PCB shop's capability as well as the material set can help create these structures and indeed PE materials can find use in more traditional PCBs. New materials and new uses of existing materials open up many possibilities in electronic interconnecting structures. PCB manufacturers have a complex manufacturing infrastructure, well suited for both additive and subtractive conductor processing. While built around rigid material processing (flex PCB being the exception), there are opportunities for PE substrate processing. As electronics devices are applied to more and more parts of our lives, we need to continually push for better solutions. Fit, function, manufacturability, and cost are all important considerations. Crossing the PCB/PE boundary is a way to meet the challenge.
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