Technical Library | 2024-08-29 18:30:46.0
The mechanical experience of consumption (i.e., feel, softness, and texture) of many foods is intrinsic to their enjoyable consumption, one example being the habit of twisting a sandwich cookie to reveal the cream. Scientifically, sandwich cookies present a paradigmatic model of parallel plate rheometry in which a fluid sample, the cream, is held between two parallel plates, the wafers. When the wafers are counterrotated, the cream deforms, flows, and ultimately fractures, leading to separation of the cookie into two pieces. We introduce Oreology (/Oriːˈɒl@dʒi/), from the Nabisco Oreo for "cookie" and the Greek rheo logia for "flow study," as the study of the flow and fracture of sandwich cookies. Using a laboratory rheometer, we measure failure mechanics of the eponymous Oreo's "creme" and probe the influence of rotation rate, amount of creme, and flavor on the stress–strain curve and postmortem creme distribution. The results typically show adhesive failure, in which nearly all (95%) creme remains on one wafer after failure, and we ascribe this to the production process, as we confirm that the creme-heavy side is uniformly oriented within most of the boxes of Oreos. However, cookies in boxes stored under potentially adverse conditions (higher temperature and humidity) show cohesive failure resulting in the creme dividing between wafer halves after failure. Failure mechanics further classify the creme texture as "mushy." Finally, we introduce and validate the design of an open-source, three-dimensionally printed Oreometer powered by rubber bands and coins for encouraging higher precision home studies to contribute new discoveries to this incipient field of study
Technical Library | 2023-05-02 19:06:43.0
As 0402 has become a common package for printed circuit board (PCB) assembly, research and development on mounting 0201 components is emerging as an important topic in the field of surface mount technology for PWB miniaturization. In this study, a test vehicle for 0201 packages was designed to investigate board design and assembly issues. Design of Experiment (DOE) was utilized, using the test vehicle, to explore the influence of key parameters in pad design, printing, pick-andplace, and reflow on the assembly process. These key parameters include printing parameters, mounting height or placement pressure, reflow ramping rate, soak time and peak temperature. The pad designs consist of rectangular pad shape, round pad shape and home-based pad shape. For each pad design, several different aperture openings on the stencil were included. The performance parameters from this experiment include solder paste height, solder paste volume and the number of post-reflow defects. By analyzing the DOE results, optimized pad designs and assembly process parameters were determined.
Technical Library | 2012-04-26 18:52:37.0
First presented at IPC Apex Expo 2012. The reliability, as tested by thermal cycling, of printed wire boards (PWB) are established by three variables; copper quality, material robustness and design. The copper quality was most influential and could be eva
Technical Library | 1999-05-06 15:14:48.0
To help the designer set the appropriate current level, AMP has developed a new method of specifying current-carrying capacity. This new method takes into account the various application factors that influence current rating.
Technical Library | 2010-11-06 02:44:38.0
An increasing number of video equipment is running at Gigabit rates today. They are interconnected through relatively large size coaxial BNC connectors. While these connectors are in general of good quality, their performance in the equipment depends on
Technical Library | 2023-08-04 15:27:30.0
A designed experiment evaluated the influence of several variables on appearance and strength of Pb-free solder joints. Components, with leads finished with nickel-palladium-gold (NiPdAu), were used from Texas Instruments (TI) and two other integrated circuit suppliers. Pb-free solder paste used was tin-silver-copper (SnAgCu) alloy. Variables were printed wiring board (PWB) pad size/stencil aperture (the pad finish was consistent; electrolysis Ni/immersion Au), reflow atmosphere, reflow temperature, Pd thickness in the NiPdAu finish, and thermal aging. Height of solder wetting to component lead sides was measured for both ceramic plate and PWB soldering. A third response was solder joint strength; a "lead pull" test determined the maximum force needed to pull the component lead from the PWB. This paper presents a statistical analysis of the designed experiment. Reflow atmosphere and pad size/stencil aperture have the greatest contribution to the height of lead side wetting. Reflow temperature, palladium thickness, and preconditioning had very little impact on side-wetting height. For lead pull, variance in the data was relatively small and the factors tested had little impact.
Technical Library | 2021-01-03 19:24:52.0
Reflow soldering is the primary method for interconnecting surface mount technology (SMT) applications. Successful implementation of this process depends on whether a low defect rate can be achieved. In general, defects often can be attributed to causes rooted in all three aspects, including materials, processes, and designs. Troubleshooting of reflow soldering requires identification and elimination of root causes. Where correcting these causes may be beyond the reach of manufacturers, further optimizing the other relevant factors becomes the next best option in order to minimize the defect rate.
Technical Library | 2023-06-12 19:18:24.0
As any new technology emerges, increasing levels of refinement are required to facilitate the mainstream implementation and continual improvement processes. In the case of lead-free processing, the initial hurdles of alloy and chemistry selection are cleared on the first level, providing a base process. The understanding gained from early work on the base process leads to the next level of refinement in optimizing the primary factors that influence yield. These factors may include thermal profiles, PWB surface finishes, component metallization, solder mask selection or stencil design.
Technical Library | 2010-04-15 20:42:44.0
The high level of current interest in embedded passives in printed circuit boards is driven by the tremendous pressure to pack more circuitry into smaller spaces. However, adoption has been limited due to design, prototyping and infrastructure issues, as well as the stability and tolerances necessary for widespread replacement of discretes. The focus of this work has been to develop a polymer thick film resistor technology to incorporate reliable organic resistors inside printed wiring boards using standard PWB processing.
Technical Library | 2013-01-09 18:31:54.0
The increased temperatures associated with lead free processes have produced significant challenges for PWB laminates. Newly developed laminates have different curing processes, are commonly filled with ceramic particles or micro-clays and can have higher Tg values. These changes designed to reduce Z-axis expansion and improve the materials resistance to thermal excursions through primary attach and rework operations have also produced harder resin systems with reduced fracture toughness.
