Technical Library | 2024-07-24 01:18:03.0
Quad Flat No-Lead (QFN) packages has become very popular in the industry and are widely used in many products. These packages have different size and pin counts, but they have a common feature: thermal pad at the bottom of device. The thermal pad of the leadless QFN provides efficient heat dissipation from the component to PCB. In many cases, arrays of the thermal via under the component is used to dissipate heat from the device. However, thermal vias can create more voids or result in solder protrusion onto the secondary side.
Technical Library | 2015-08-13 15:52:40.0
Pad cratering has become more prevalent with the switch to lead free solders and lead free compatible laminates. This mainly is due to the use of higher reflow temperature, stiffer Pb-free solder alloys, and the more brittle Pb-free compatible laminates. However, pad cratering is difficult to detect by monitoring electric resistance since pad cratering initiates before an electrical failure occurs. Several methods have been developed to evaluate laminate materials' resistance to pad cratering. Pad-solder level tests include ball shear, ball pull and pin pull. The detailed methods for ball shear, ball pull, and pin pull testing are documented in an industry standard IPC-9708. Bansal, et al. proposed to use acoustic emission (AE) sensors to detect pad cratering during four-point bend test. Currently there is an industry-working group working on test guidelines for acoustic emission measurement during mechanical testing.
Technical Library | 2024-07-24 00:51:44.0
A blade server system (BSS) utilizes voltage regulator modules (VRMs), in the form of quad flat no-lead (QFN) devices, to provide power distribution to various components on the system board. Depending on the power requirements of the circuit, these VRMs can be mounted as single devices or banked together. In addition, the power density of the VRM can be high enough to warrant heat dissipation through the use of a heat sink. Typically, at field conditions (FCs), the BSS are powered on and off up to four times per day, with their ambient temperature cycling between 258C and 808C. This cyclical temperature gradient drives inelastic strain in the solder joints due to the coefficient of thermal expansion (CTE) mismatch between the QFN and the circuit card. In addition, the heat sink, coupled with the QFN and the circuit card, can induce additional inelastic solder joint strain, resulting in early solder joint fatigue failure. To understand the effect of the heat sink mounting, a FEM (finite element model of four QFNs mounted to a BSS circuit card was developed. The model was exercised to calculate the maximum strain energy in a critical joint due to cyclic strain, and the results were compared for a QFN with and without a heat sink. It was determined that the presence of the heat sink did contribute to higher strain energy and therefore could lead to earlier joint failure. Although the presence of the heat sink is required, careful design of the mounting should be employed to provide lateral slip, essentially decoupling the heat sink from the QFN joint strain. Details of the modeling and results, along with DIC (digital image correlation) measurements of heat sink lateral slip, are presented.
Technical Library | 2009-11-05 11:17:32.0
Head-in-pillow (HiP), also known as ball-and-socket, is a solder joint defect where the solder paste deposit wets the pad, but does not fully wet the ball. This results in a solder joint with enough of a connection to have electrical integrity, but lacking sufficient mechanical strength. Due to the lack of solder joint strength, these components may fail with very little mechanical or thermal stress. This potentially costly defect is not usually detected in functional testing, and only shows up as a failure in the field after the assembly has been exposed to some physical or thermal stress.
Technical Library | 2013-03-21 21:24:49.0
This paper explores the behaviour of a copper test vehicle with multiple reflowed solder joints, which has direct relevance to ball grid arrays (BGA) and high density interconnect structures. The paper explores the relative stress conditions on the distributed joints and the sensitivity to ball joint shape... First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2024-07-24 01:04:35.0
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry recently. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints.
Technical Library | 2012-07-27 11:18:29.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing vo
Technical Library | 2009-03-13 00:27:09.0
Open product reliability testing in Stockholm, Sweden in January as part of a live production event generated some quite startling results. It was apparent that many components simply cannot handle the high reflow temperatures of a lead-free soldering process, and that many surface-mount machine suppliers are battling significant problems with QFN packages and other components that are mounting edgeways (bill boarding). However, some suppliers have achieved good results.
Technical Library | 2017-08-17 12:28:30.0
At SMT assembly, flux outgassing/drying is difficult for devices with poor venting channel, and resulted in insufficiently dried/burnt-off flux residue for no-clean process. Examples including: Large low stand-off components such as QFN, LGA Components covered under electromagnetic shield which has either no or few venting holes Components assembled within cavity of board Any other devices with small open space around solder joints
Technical Library | 2012-01-12 22:51:19.0
In this paper, hollowed solder ball structures in wafer level packages are investigated. Detailed 3-D finite element modelling is conducted for stress and accumulated inelastic strain energy density or creep strain analysis. Three cases are studied in thi
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