Technical Library: revision and changes (Page 2 of 3)

Projection Moiré vs. Shadow Moiré for Warpage Measurement and Failure Analysis of Advanced Packages

Technical Library | 2013-01-31 18:43:15.0

There are three key industry trends that are driving the need for temperature-dependent warpage measurement: the trend toward finer-pitch devices, the emergence of lead-free processing, and changes in device form factors. Warpage measurement has become a key measurement for analysis; prevention and prediction of interconnect defects and has been employed in failure analysis labs and production sites worldwide. First published in the 2012 IPC APEX EXPO technical conference proceedings

ZN Technologies

Whisker Formation Induced by Component and Assembly Ionic Contamination

Technical Library | 2023-02-13 18:56:42.0

This paper describes the results of an intensive whisker formation study on Pb-free assemblies with different levels of cleanliness. Thirteen types of as-received surface-mount and pin-through-hole components were cleaned and intentionally contaminated with solutions containing chloride, sulfate, bromide, and nitrate. Then the parts were assembled on double-sided boards that were also cleaned or intentionally contaminated with three fluxes having different halide contents. The assemblies were subjected to high-temperature/high-humidity testing (85_C/85% RH). Periodic examination found that contamination triggered whisker formation on both exposed tin and solder fillets. Whisker occurrence and parameters depending on the type and level of contamination are discussed. Cross-sections were used to assess the metallurgical aspects of whisker formation and the microstructural changes occurring during corrosion.

Celestica Corporation

Maintenance and operation of walk-in temperature humidity test chamber

Technical Library | 2019-11-17 22:46:45.0

Overview of walk-in temperature and humidity chamber: It also belongs to environmental test equipment, it tests whether the product can resist high temperature, low temperature, humidity, or the physical and chemical changes produced under extreme conditions, the walk-in temperature and humidity chamber volume is large, the product is placed, or a large object can be placed, such as automobile, new energy, television and liquid crystal screen, etc. How to do the routine maintenance of the walk-in temperature and humidity chamber: 1. The wet gauze basically, if there is no special case, s/b usually changed once in 3 months 2. The water channel shall be regularly cleaned, including water cup, water tank, etc., so as to prevent the water from being blocked,affect the humidity test. 3. It is forbidden to test the flammable and explosive products inside working room. 4. Clean the chamber on a regular basis 2. How to operate walk-in temperature and humidity chamber: The operation method is same as standard temperature humidity test chamber,the controller is 7-inch LCD programmable color screen, you only need to setthe temperature point---test time--how many cycles need to be tested, This can be done automatically, and the machine will stop automatically when it is complete. If there is any problem during the operation, the corresponding problem point will be displayed on the machine control screen. Walk-in temperature and humidity chamber is a must equipment for reliability test of Automobile,Aerospace,Electronic parts,etc,the operation and maintenance are easy,it is teh tear down mahcine,Climatest engineers will be dispatched to do on-site support,for instance,we will finish commissioning,train customers how to operate,maintain,welcome to follow our company facebook page:https://www.facebook.com/Climatechambers

Symor Instrument Equipment Co.,Ltd

Review of Interconnect Stress Testing Protocols and Their Effectiveness in Screening Microvias

Technical Library | 2016-11-30 15:53:15.0

The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.

Raytheon

High Throw Electroless Copper - Enabling new Opportunities for IC Substrates and HDI Manufacturing

Technical Library | 2017-04-20 13:51:14.0

The one constant in electronics manufacturing is change. Moore's Law, which successfully predicted a rate of change at which transistor counts doubled on Integrated Circuits (ICs) at lower cost for decades, is ceding to be an appropriate prediction tool. Increasing technical and economic requirements, deriving from the semiconductor environment, are cascaded down to the printed circuit and in particular to the IC substrate manufacturers. This is both a challenge and an opportunity for IC Substrate manufacturers, when dealing with the demands of the packaging market. (...)This paper introduces two new electroless copper baths developed for IC substrates manufacturing based on Semi Additive Process (SAP) technology (hereafter referred to as E'less Copper IC) and HDI production (hereafter referred to as E'less Copper HDI) and optimized for high throw into BMVs. An introduction to reliable throwing power measurement methods based on scanning electron microscope (SEM) is given, followed by a compilation and discussion of key performance criteria for each application, namely throwing power, copper adhesion on the substrate, dry film adhesion and reliability.

Atotech

Understanding the Effect of Process Changes and Flux Chemistry on Mid-Chip Solder Balling

Technical Library | 2016-11-30 21:30:50.0

Mid-chip solder balling is a defect typically associated with solder paste exhibiting poor hot slump and/or insufficient wetting during the reflow soldering process, resulting in paste flowing under the component or onto the solder resist. Once molten, this solder is compressed and forced to the side of the component, causing mid-chip solder balling.This paper documents the experimental work performed to further understand the impact on mid-chip solder balling from both the manufacturing process and the flux chemistry.

Henkel Electronic Materials

Advanced modelling technique achieves near to zero set up time and minimal tuning

Technical Library | 2015-04-29 03:29:56.0

Statistical Appearance Modelling technology enables an AOI system to “learn real world variation” based on operator interaction with inspection task results. This provides an accurate statistical description of normal variation in a product. With modelling technology, the user does not have to anticipate potential defects as the system will “flag” anything outside the “normal production range”. And, since the system is programmed with real production variation, it is sensitive to small subtle changes enabling reliable defect detection. Autonomous prediction of process variation enables an AOI system to be set up from a single PCB with production-ready performance. Setup time can be

CyberOptics Corporation

Cleaning Of Assembled PCBs - A Crucial Way of Enhancing Product Reliability and Avoiding Problems in the Field

Technical Library | 2014-10-09 17:51:35.0

Over the last years more and more international newspapers reported in Europe / USA and Japan: "Tunnel train got stuck under the Channel – thousands of people stranded", "Recall of thousands of cars to workshops for control and repair", "Power Failures left households without energy for hours." Very often news like this relate to malfunctions of electric and electronic circuits under adverse conditions or sometimes even in normal operating environment (...) The presentation will deal with all kinds of aspect of cleaning to ensure the reliability of electronic circuitry in ever changing operation conditions in the most important industrial areas.

Kolb Cleaning Technology USA LLC

A New Line Balancing Method Considering Robot Count and Operational Costs in Electronics Assembly

Technical Library | 2019-05-02 13:47:39.0

Automating electronics assembly is complex because many devices are not manufactured on a scale that justifies the cost of setting up robotic systems, which need frequent readjustments as models change. Moreover, robots are only appropriate for a limited part of assembly because small, intricate devices are particularly difficult for them to assemble. Therefore, assembly line designers must minimize operational and readjustment costs by determining the optimal assignment of tasks and resources for workstations. Several research studies address task assignment issues, most of them dealing with robot costs as fixed amount, ignoring operational costs. In real factories, the cost of human resources is constant, whereas robot costs increase with uptime. Thus, human workload must be as large and robot workload as small as possible for the given number of humans and robots. We propose a new task assignment method that establishes a workload balancing that meet precedence and further constraints.

Fujitsu Laboratories Ltd.

Investigation of Cutting Quality and Mitigation Methods for Laser Depaneling of Printed Circuit Boards

Technical Library | 2019-09-11 23:33:04.0

There are numerous techniques to singulate printed circuit boards after assembly including break-out, routing, wheel cutting and now laser cutting. Lasers have several desirable advantages such as very narrow kerf widths as well as virtually no dust, no mechanical stress, visual pattern recognition and fast set-up changes. The very narrow kerf width resulting from laser ablation and the very tight tolerance of the cutting path placement allows for more usable space on the panel. However, the energy used in the laser cutting process can also create unwanted products on the cut walls as a result of the direct laser ablation. The question raised often is: What are these products, and how far can the creation of such products be mitigated through variation of the laser cutting process, laser parameters and material handling? This paper discusses the type and quantity of the products found on sidewalls of laser depaneled circuit boards and it quantifies the results through measurements of breakdown voltage, as well as electrical impedance. Further this paper discusses mitigation strategies to prevent or limit the amount of change in surface quality as a result of the laser cutting process. Depending on the final application of the circuit board it may prompt a need for proper specification of the expected results in terms of cut surface quality. This in turn will impact the placement of runs and components during layout. It will assist designers and engineers in defining these parameters sufficiently in order to have a predictable quality of the circuit boards after depaneling.

LPKF Laser & Electronics


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