Technical Library | 2023-06-14 01:09:26.0
In the electronic packaging industry, it is important to be able to make accurate predictions of board level solder joint reliability during thermal cycling exposures. The Anand viscoelastic constitutive model is often used to represent the material behavior of the solder in finite element simulations. This model is defined using nine material parameters, and the reliability prediction results are often highly sensitive to the Anand parameters. In this work, an investigation on the Anand constitutive model and its application to SAC solders of various Ag contents (i.e. SACN05, with N = 1, 2, 3, 4) has been performed. For each alloy, both water quenched (WQ) and reflowed (RF) solidification profiles were utilized to establish two unique specimen microstructures, and the same reflow profile was used for all four of the SAC alloys so that the results could be compared and the effects of Ag content could be studied systematically.
Technical Library | 2019-04-24 20:06:51.0
Choosing an outsourced manufacturing partner that is perfect for a new product and close to your design team is quite different to choosing a partner that can manufacture that same product in volume in lower cost locations and fulfill globally. This is where the Gateway model comes into its own. Most large EMS have structured their organizations to leverage proximity to OEM design teams in high cost regions while providing the benefits of low cost regions for volume manufacturing. The "Gateway" facility in higher cost regions provides design engineering, supply chain design, prototype, and NPI services. The goal of the Gateway is to develop an effective build recipe that can then be effectively and seamlessly transferred to one or more volume manufacturing facility that offers lower costs and direct fulfillment to consumers.We will present a case study that highlights the value of this model and that shows some of the key elements that allow for seamless transitions from plant to plant. The Gateway model is an essential element to a successful global manufacturing model and helps ensure that products are made in the right geography.
Technical Library | 2014-07-10 17:37:18.0
This paper studies and compares the effects of pull–pull and 3-point bending cyclic loadings on the mechanical fatigue damage behaviors of a solder joint in a surface-mount electronic package.The comparisons are based on experimental investigations using scanning electron microscopy (SEM) in-situ technology and nonlinear finite element modeling, respectively. The compared results indicate that there are different threshold levels of plastic strain for the initial damage of solder joints under two cyclic applied loads; meanwhile, fatigue crack initiation occurs at different locations, and the accumulation of equivalent plastic strain determines the trend and direction of fatigue crack propagation. In addition, simulation results of the fatigue damage process of solder joints considering a constitutive model of damage initiation criteria for ductile materials and damage evolution based on accumulating inelastic hysteresis energy are identical to the experimental results. The actual fatigue life of the solder joint is almost the same and demonstrates that the FE modeling used in this study can provide an accurate prediction of solder joint fatigue failure.
Technical Library | 2016-03-24 17:37:09.0
Today's Electronic Industry is changing at a high pace. The root causes are manifold. So world population is growing up to eight billions and gives new challenges in terms of urbanization, mobility and connectivity. Consequently, there will raise up a lot of new business models for the electronic industry. Connectivity will take a large influence on our lives. Concepts like Industry 4.0, internet of things, M2M communication, smart homes or communication in or to cars are growing up. All these applications are based on the same demanding requirement – a high amount of data and increased data transfer rate. These arguments bring up large challenges to the Printed Circuit Board (PCB) design and manufacturing.This paper investigates the impact of different PCB manufacturing technologies and their relation to their high frequency behavior. In the course of the paper a brief overview of PCB manufacturing capabilities is be presented. Moreover, signal losses in terms of frequency, design, manufacturing processes, and substrate materials are investigated. The aim of this paper is, to develop a concept to use materials in combination with optimized PCB manufacturing processes, which allows a significant reduction of losses and increased signal quality.
Technical Library | 2017-02-28 12:39:50.0
During the last 5 years mobile phones and other portable consumer electronics have been extremely popular and spread all over the world in different climate zones in very high volumes. At the same time the mobile phone terminal for many people has become a necessity that is brought with them in any activity they practice. These changes in user behavior have heavily changed the impact on handheld terminals from moisture, sweat, corrosive atmospheres and mechanical drop. As a result of this the requirement to solder joint reliability, corrosion stability and wear resistance are heavily increasing to keep a high reliability of the terminal.Immersion Ni/Au has been the overall dominant surface finish on Printed Wiring Boards (PWB's) for the last 10 years, but a paradigm shift to avoid use of this thin and porous surface finish is ongoing nowadays because it can’t address these challenges in a satisfactory way.In today's handheld terminals, Organic Solder Preservative (OSP) has replaced Immersion Ni/Au on solder pads. Carbon surface finish for Key- and spring contact-pads, combined with the right concept design can make use of Immersion Ni/Au unnecessary in the near future. The result will be higher reliability with less expensive and simpler processes.This paper will discuss the various considerations for choice of surface finish and results from the feasibility studies performed.
Technical Library | 2018-04-18 23:55:01.0
Higher functionality, higher performance and higher reliability with smaller real estate are the mantras of any electronic device and the future guarantees more of the same. In order to achieve the requirements of these devices, designs must incorporate fine line and via pitch while maintain good circuitry adhesion at a smooth plating-resin interface to improve signal integrity. The Semi-Additive Process (SAP) is a production-proven method used on low dielectric loss tangent (Df) build-up materials that enables the manufacture of ultra-fine circuitry. (...) This paper will discuss a new SAP process for low loss build-up materials with low desmear roughness (Ra= 40-100 nm) and excellent adhesion (610-680 gf/cm) at various processing conditions. Along with the process flow, the current work will also present results and a discussion regarding characterization on the morphology and composition of resin and/or metal plating surfaces using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX), surface roughness analysis, plating-resin adhesion evaluation from 90o peel tests
Technical Library | 2018-04-25 15:54:52.0
An automotive wire harness rarely has just a single part number that can be ordered and installed in a vehicle. Typically, there are many different versions of the same harness based on the orderable content in the vehicle. These versions (often called harness levels) will have unique part numbers. The quantity of these levels and their content is what is typically called complexity and it has a significant impact on the cost of the harness.Quantifying these costs is often very difficult especially with manual methods of deriving and costing the complexity solution. Therefore, traditionally, harness costing has focused on the piece cost of each harness level. When these complexity related costs are considered it is typically with overly simplified cost modeling techniques.This paper will focus on the quantification of these complexity related costs so that they can be modeled allowing automated algorithms to optimize for these costs. A number of real world examples will be provided as well. Since no two businesses are alike, it is the aim of this paper to provide the foundational knowledge and methodology so the reader can assess their own business to model how variation complexity costs affect their business.
Technical Library | 2019-02-13 13:45:11.0
Development of information and telecommunications network is outstanding in recent years, and it is required for the related equipment such as communication base stations, servers and routers, to process huge amount of data in no time. As an electrical signal becomes faster and faster, how to prevent signal delay by transmission loss is a big issue for Printed Circuit Boards (PCB) loaded on such equipments. There are two main factors as the cause of transmission loss; dielectric loss and conductor loss. To decrease the dielectric loss, materials having low dielectric constant and low loss tangent have been developed. On the other hand, reducing the surface roughness of the copper foil itself to be used or minimizing the surface roughness by modifying surface treatment process of the conductor patterns before lamination is considered to be effective in order to decrease the conductor loss. However, there is a possibility that reduction in the surface roughness of the conductor patterns will lead to the decrease in adhesion of conductor patterns to dielectric resin and result in the deterioration of reliability of PCB itself. In this paper, we will show the evaluation results of adhesion performance and electrical properties using certain type of dielectric material for high frequency PCB, several types of copper foil and several surface treatment processes of the conductor patterns. Moreover, we will indicate a technique from the aspect of surface treatment process in order to ensure reliability and, at the same time, to prevent signal delay at the signal frequency over 20 GHz.
Technical Library | 2019-07-17 17:56:34.0
The increased demand for electronic devices in recent years has led to an extensive research in the field to meet the requirements of the industry. Electrolytic copper has been an important technology in the fabrication of PCBs and semiconductors. Aqueous sulfuric acid baths are explored for filling or building up with copper structures like blind micro vias (BMV), trenches, through holes (TH), and pillar bumps. As circuit miniaturization continues, developing a process that simultaneously fills vias and plates TH with various sizes and aspect ratios, while minimizing the surface copper thickness is critical. Filling BMV and plating TH at the same time, presents great difficulties for the PCB manufactures. The conventional copper plating processes that provide good via fill and leveling of the deposit tend to worsen the throwing power (TP) of the electroplating bath. TP is defined as the ratio of the deposit copper thickness in the center of the through hole to its thickness at the surface. In this paper an optimization of recently developed innovative, one step acid copper plating technology for filling vias with a minimal surface thickness and plating through holes is presented.
Technical Library | 2019-11-12 02:09:22.0
Thermal shock test chamber can be used for testing the chemical change or physical damage on composite materials caused by the thermal expansion and contraction of the sample in the shortest time,which is subjected to extremely and continuous high and low temperature environment.so how to check the temperature recovery time of this chamber? Normally we take following steps to inspect the temepratuire recovering time: 1.Install the temperature sensor at the specified position, and adjust the temperature controller of hot zone and cold zone to the required nominal temperature respectively. 2.The temperature increases and reduces respectively,30min after temperature in two zones reach stable status,record temperature value of the measuring point,pls set the temperature value of two zones to be required nominal temperature. 3.The temperature shock test chamber automatically places the inspected load into theh ot zone,select the corresponding retention time according to regulated standard. 4.Set the transfer time,then the inspection load is transferred from hot zone to cold zone, and the temperature of the measuring point is observed and recorded, and then the reverse conversion of the load from cold zone to hot zone is carried out according to the same method, and the temperature of the measuring point is observed and recorded. www.climatechambers.com
winsouce.jpg)
