Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2023-08-14 09:06:53.0
In the operation of SMT mounter, the process and integrity of the nozzle of the mounter will have a significant impact on the performance of the machine. As one of the important components of the SMT machine, it is necessary for us to carry out daily maintenance and upkeep of the SMT nozzle. To ensure that the suction nozzle of the SMT machine is intact before operation, how should we do a good job of maintaining the suction nozzle of the SMT machine during normal use? KINGSUN technical team analysis operation has the following main points: 1.Wipe the surface of the SMT nozzle with a dust-free cloth. 2.The small aperture nozzle can be passed through with a thin steel wire and then blown with an air gun. 3.The surface of the nozzle should not be soaked with corrosive solution such as alcohol, as this may cause the surface to fall off. 4.HOLDER should use a cotton swab to wipe the cavity and not damage the filter screen. 5.Regular addition of special grease to HOLDER claws. 6.According to production, it is best to regularly maintain and do other maintenance regularly. (* Suitable for Yamaha SMT machine nozzles , JUKI SMT machine nozzles, Samsung SMT machine nozzles, Panasonic SMT machine nozzles, Fuji SMT machine nozzles, Siemens SMT machine nozzles etc.) Regarding the SMT machine nozzle daily maintenance operation instructions, KINGSUN share with you here , hoping to be helpful to you. More information about Products please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com , thanks.
Technical Library | 2014-10-27 08:54:59.0
A lot of time and effort often goes into finding the right equipment for your facility. Purchasing a new wire cut & strip machine is no different. With so many options, where does one start? Asking these five questions during the decision making process will help ensure you end up with equipment that fits all of your needs.
Technical Library | 2016-11-10 08:56:54.0
It goes without saying that every manufacturer wants to ensure they are producing a quality product. Standards and specifications from various organizations provide a guideline from which manufacturers can measure different areas of quality, while also providing the end user with the reassurance that they are purchasing a trustworthy, long-lasting product. Within the wire processing industry there are many standards that manufacturers may choose or be required to adhere to. These standards and specifications are constantly evolving and increasing in detail, especially as monitoring technology improves.
Technical Library | 2017-09-25 10:36:52.0
Laser wire stripping was developed by NASA in the 1970s as part of the Space Shuttle program. The technology made it possible to use smaller sized wires with thinner insulations, without risk of the damage that can be caused by traditional mechanical wire stripping methods. Laser wire stripping technology was commercialized in the 1990s and was initially used for aerospace and defense applications. Laser wire stripping then grew significantly when the consumer electronics market exploded as lasers became the only stripping solution for the tiny data cables found in laptops, mobile phones and other consumer electronics products. Another large industry that has adopted laser wire stripping methods, and for good reason, is high-end medical device manufacturing.
Technical Library | 2013-01-30 14:02:44.0
Many OEM’s require that individual wires and cables used in their products be clearly identified with a mark or label. For some, such as in the military and aerospace markets, wire and cable identification (or “wire ID”) is mandatory and the process is governed by stringent specifications, such as SAE AS50881 (formerly MIL5088L). For others, the decision to use wire ID is a voluntary one. This article will describe what type of information is typically identified on wire and cables, concepts for improved productivity, what types of systems are available and the pros and cons of each.
Technical Library | 2014-07-24 16:26:34.0
Wire bonding a die to a package has traditionally been performed using either aluminum or gold wire. Gold wire provides the ability to use a ball and stitch process. This technique provides more control over loop height and bond placement. The drawback has been the increasing cost of the gold wire. Lower cost Al wire has been used for wedge-wedge bonds but these are not as versatile for complex package assembly. The use of copper wire for ball-stitch bonding has been proposed and recently implemented in high volume to solve the cost issues with gold. As one would expect, bonding with copper is not as forgiving as with gold mainly due to oxide growth and hardness differences. This paper will examine the common failure mechanisms that one might experience when implementing this new technology.
Technical Library | 2017-08-31 13:43:48.0
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction
Technical Library | 2015-08-17 09:07:11.0
Since a high percentage of product failures can be traced to poor electrical connections, crimp quality is of paramount importance. There are many factors that come into play that affect crimp quality and knowing the relevant factors, and to what extent each factor affects the end result, will help to guide the process engineer towards achieving the best possible results.
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
