Technical Library | 2023-09-18 14:10:01.0
As with many advancements in the electronics industry, consumer electronics is driving the trends for electronic packaging technologies toward reducing size and increasing functionality. Microelectronics meeting the technology needs for higher performance, reduced power consumption and size, and off the- shelf availability. Due to the breadth of work being performed in the area of microelectronics packaging/components, this report limits it presentation to board design, manufacturing, and processing parameters on assembly reliability for leadless (e.g., quad flat no-lead (QFN) or a generic term of bottom termination component (BTC)) packages. This style of package was selected for investigation because of its significant growth, lower cost, and improved functionality, especially for use in an RF application.
Technical Library | 2013-03-14 17:19:28.0
Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2021-01-28 01:55:00.0
Printed circuit board surface finishes are a topic of constant discussion as environmental influences, such as the Restriction of Hazardous Substances (RoHS) Directive or technology challenges, such as flip chip and 01005 passive components, initiate technology changes. These factors drive the need for greater control of processing characteristics like coplanarity and solderability, which influence the selection of surface finishes and impact costs as well as process robustness and integrity. The ideal printed circuit board finish would have good solderability, long shelf life, ease of fabrication/processing, robust environmental performance and provide dual soldering/wirebonding capabilities; unfortunately no single industry surface finish possesses all of these traits. The selection of a printed circuit board surface finish is ultimately a series of compromises for a given application.
Technical Library | 2022-03-02 21:26:51.0
The solderability of a nickel-palladium-gold (Ni-Pd-Au) finish on a Cu substrate was evaluated for the Pb-free solder, 95.5Sn-3.9Ag-0.6 Cu (wt.%, abbreviated Sn-Ag-Cu) and the eutectic 63Sn-37 Pb (Sn-Pb) alloy. The solder temperature was 245ºC. The flux was a rosin-based mildly activated (RMA) solution. The Ni-Pd-Au finish was tested in the as-fabricated condition as well as after exposure to one of the following accelerated storage (shelf life) regiments: (1) 33.6, 67.2, or 336 hours in the Battelle Class 2 flowing gas environment or (2) 5, 16, or 24 hours of steam aging (88ºC, 90%RH).
Technical Library | 2023-10-23 18:56:52.0
A thin chip package for off-the-shelf ICs is developed which enables the embedding of these chips into a flexible circuit board. The package consists of a copper fan-out on a polyimide substrate, in which the thinned IC (30um) is embedded. These packages are subsequently integrated in a standard flexible circuit board (FCB). A microcontroller and a proprietary DSP processor are embedded using this technology. The yield of the Ultra-Thin Chip package (UTCP) was measured before embedding in the circuit board, and reaches up to 87% for the packaged microcontrollers (MSP430 family, known-good dies). The yield on the DSP processor was measured to be 62%. After embedding in the FCB, 95% of the functional UTCP-packaged dies are still functional.
Technical Library | 2020-10-27 02:02:17.0
Solder powder size is a popular topic in the electronics industry due to the continuing trend of miniaturization of electronics. The question commonly asked is "when should we switch from Type 3 to a smaller solder powder?" Solder powder size is usually chosen based on the printing requirements for the solder paste. It is common practice to use IPC Type 4 or 5 solder powders for stencil designs that include area ratios below the recommended IPC limit of 0.66. The effects of solder powder size on printability of solder paste have been well documented. The size of the solder powder affects the performance of the solder paste in other ways. Shelf life, stencil life, reflow performance, voiding behavior, and reactivity / stability are all affected by solder powder size. Testing was conducted to measure each of these solder paste performance attributes for IPC Type 3, Type 4, Type 5 and Type 6 SAC305 solder powders in both water soluble and no clean solder pastes. The performance data for each size of solder powder in each solder paste flux was quantified and summarized. Guidance for choosing the optimal size of solder powder is given based on the results of this study.
