Technical Library: silicon (Page 2 of 5)

Analog FastSPICE Platform Full-Circuit PLL Verification

Technical Library | 2016-06-30 14:00:32.0

When designing PLLs in nanometer CMOS, it is essential to validate the closed-loop PLL performance metrics with nanometer SPICE accuracy before going to silicon. Transistor-level, closed-loop PLL verification has been impractical due to traditional SPICE and RF simulator performance and capacity limitations. By using Analog FastSPICE, designers dont have to trade accuracy for performance. Read this white paper to see how AFS: Delivers closed-loop PLL transistor-level verification Supports direct jitter measurements Produces phase noise results correlating within 1-2dB of silicon

Mentor Graphics

Silicon Microelectronics Technology

Technical Library | 1999-05-06 13:50:14.0

This paper begins with a historical review of that revolution, from the first integrated circuit to modern very large scale integration (VLSI) technology, and then reviews the development of present-day microelectronics manufacturing technology...

Alcatel-Lucent

Troubleshooting of Diffusion Silicon Pressure Transmitter

Technical Library | 2021-12-17 01:30:28.0

Diffusion silicon pressure transmitter is applied in a wide variety of industries, such as petroleum, chemical industry, steel, power, light industry and environmental protection industry. It can complete the work of measurement and control of the gauge pressure, negative pressure or absolute pressure of various fluid pressure. Most importantly, this type of transmitter can be used in corrosive medium and harsh or dangerous environment. In the process of using the transmitter, there may be some faults or problems.

OKmarts Industrial Parts Mall

A Novel Method for the Fabrication of a High-Density Carbon Nanotube Microelectrode Array

Technical Library | 2016-11-03 17:53:56.0

We present a novel method for fabricating a high-density carbon nanotube microelectrode array (MEA) chip. Vertically aligned carbon nanotubes (VACNTs) were synthesized by microwave plasma-enhanced chemical vapor deposition and thermal chemical vapor deposition. The device was characterized using electrochemical experiments such as cyclic voltammetry, impedance spectroscopy and potential transient measurements. Through-silicon vias (TSVs) were fabricated and partially filled with polycrystalline silicon to allow electrical connection from the high-density electrodes to a stimulator microchip.In response to the demand for higher resolution implants, we have developed a unique process to obtain a high-density electrode array by making the microelectrodes smaller in size and designing new ways of routing the electrodes to current sources.

Hong Kong University of Science

Effect of Thermal Aging on Solderabilityof ENEPIG Surface Finish Used in Printed Circuit Boards

Technical Library | 2021-12-29 19:52:50.0

Medtronic seeks to quantify the thermal aging limits of electroless Ni-electroless Pd-immersion Au (ENEPIG) surface finishes to determine how aggressive the silicon burn-in process can be without loss of solderability. Silicon burn-in (power testing at elevated temperature) is used to eliminate early field failures, critical for device reliability. Thermal aging due to burn-in or annealing causes Ni and Pd diffusion to and oxidation on the surface. Surface oxides limit wetting of the PbSn solder, affecting electrical connectivity of components soldered afterburn-in. Isothermal aging of two ENEPIG surface finishes was performed at 75°C-150°C for 100 hrs-1500hrs to test the thermal aging limits and identify how loss of solderability occurs.

Purdue University

The Foundation of the Silicon Age

Technical Library | 1999-05-06 13:35:26.0

The invention of the transistor almost fifty years ago was one of the most important technical developments of this century. It has had profound impact on the way we live and the way we work. This paper describes the events that led to the invention of the point-contact transistor in December of 1947. It continues with the development of the theory of the junction transistor in early 1948 and the fabrication of the first grown-junction transistor in 1950.

Alcatel-Lucent

Screen and Stencil Printing Processes for Wafer Backside Coating

Technical Library | 2009-09-09 15:08:19.0

Stencil printing equipment has traditionally been used in the surface mount assembly industry for solder paste printing. In recent years the flexibility of the tool has been exploited for a wide range of materials and processes to aid semiconductor packaging and assembly. One such application has been the deposition of adhesive coatings onto the backside of silicon wafers.

ASM Assembly Systems (DEK)

Conformal Coating Defects

Technical Library | 2023-07-04 17:31:22.0

Conformal Coatings are polymeric materials used to protect circuitry, parts, and related components. They are most commonly used to protect printed circuit boards (PCBs) and electronic devices. However, conformal coatings can be applied to a wide variety of materials, including metal, plastic, silicone, ceramics, glass, and even paper. We use the term "substrate" to refer to an object or material that's been coated with a conformal coating.

Diamond MT

Test Structures for Benchmarking the Electrostatic Discharge (ESD) Robustness of CMOS Technologies

Technical Library | 1999-08-05 10:34:17.0

This document defines a set of standard test structures with which to benchmark the electrostatic discharge (ESD) robustness of CMOS technologies. The test structures are intended to be used to evaluate the elements of an integrated circuit in the high current and voltage ranges characteristic of ESD events. Test structures are given for resistors, diodes, MOS devices, interconnects, silicon control rectifiers, and parasitic devices. The document explains the implementation strategy and the method of tabulating ESD robustness for various technologies.

SEMATECH

New Precision Coating Deposition Method for Photovoltaic Manufacturing

Technical Library | 2009-05-28 18:15:46.0

Considerable effort is ongoing to improve the efficiency and to move towards high-volume manufacturing of photovoltaic cells. Much attention has been focused on developing in-line processes to replace the current batch processes. A critical process to improve the performance of solar wafers is the application of Dopants. The basic requirement for this process is an automated method for applying a very thin, uniform film of Dopant to the silicon wafer as part of an in-line manufacturing process.

Ultrasonic Systems, Inc.


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