Technical Library | 2016-06-30 14:00:32.0
When designing PLLs in nanometer CMOS, it is essential to validate the closed-loop PLL performance metrics with nanometer SPICE accuracy before going to silicon. Transistor-level, closed-loop PLL verification has been impractical due to traditional SPICE and RF simulator performance and capacity limitations. By using Analog FastSPICE, designers dont have to trade accuracy for performance. Read this white paper to see how AFS: Delivers closed-loop PLL transistor-level verification Supports direct jitter measurements Produces phase noise results correlating within 1-2dB of silicon
Technical Library | 2013-02-08 22:56:47.0
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.
Technical Library | 2013-02-14 12:54:29.0
Boundary-scan (1149.1) technology was originally developed to provide a far easier method to perform digital DC testing to detect intra-IC interconnect assembly faults, such as solder shorts and opens. Today's advanced IC technology now includes high-speed differential interfaces that include AC or DC coupling components loaded on the printed circuit assembly. Simple stuck-at-high/low test methods are not sufficient to detect all assembly fault conditions, which includes shorts, opens and missing components. Improved diagnostics requires detailed circuit analysis, predictive assembly fault simulation and more complex testing to isolate and accurately detect all possible assembly faults... First published in the 2012 IPC APEX EXPO technical conference proceedings
Technical Library | 2014-06-12 16:40:19.0
Occurrence of popcorn in IC packages while assembling them onto the PCB is a well known moisture sensitive reliability issues, especially for surface mount packages. Commonly reflow soldering simulation process is conducted to assess the impact of assembling IC package onto PCB. A strain gauge-based instrumentation is developed to investigate the popcorn effect in surface mount packages during reflow soldering process. The instrument is capable of providing real-time quantitative information of the occurrence popcorn phenomenon in IC packages. It is found that the popcorn occur temperatures between 218 to 241°C depending on moisture soak condition, but not at the peak temperature of the reflow process. The presence of popcorn and delamination are further confirmed by scanning acoustic tomography as a failure analysis.
WASET - World Academy of Science, Engineering and Technology
Technical Library | 2017-11-15 22:49:14.0
While a significant level of voiding can be tolerated in solder joints where electrical conductivity is the main requirement, voiding at any level severely compromises thermal conductivity. For example, in LED lighting modules effective conduction of heat through the 1st level die attach to the substrate and then through the 2nd level attach to the heat sink is critical to performance so that voiding in the solder joints at both levels must be minimized. (...) In this paper, the authors will review the factors that influence the incidence of voids in small and large area solder joints that simulate, respectively, the 1st and 2nd level joints in LED modules and discuss mitigation strategies appropriate to each level. They will also report the results of a study on the effect on the incidence of voids of flux medium formulation and the optimization of the thermal profile to ensure that most of the volatiles are released early in the reflow process.
Technical Library | 2019-04-18 21:53:04.0
IPX9K Rain Spray Test Chamber(high Pressure high temperature water jet) simulates the use of pressure washer steam cleaning onto the enclosure, It is recognised as the harshest of all ingress protection tests. However the requirement is becoming more prevalent across many industries. Test method for IPX9K : Make sure the water temperature inside the water tank +80°C, water flow rate with 14L-16L per min, water pressure: 8000 Kpa -10000 Kpa (80–100 bar) at distance of 100mm~ 150mm, The test duration is 30 seconds in each of 4 angles, total spray testing time is 2 minutes. IPX9 rain test chamber applicable standards: IEC 60529 – Degrees of protection provided by enclosures (IP Code).Here is working principle in picture.
Technical Library | 2019-12-26 19:13:52.0
Plated through hole (PTH) plays a critical role in printed circuit board (PCB) reliability. Thermal fatigue deformation of the PTH material is regarded as the primary factor affecting the lifetime of electrical devices. Numerous research efforts have focused on the failure mechanism model of PTH. However, most of the existing models were based on the one-dimensional structure hypothesis without taking the multilayered structure and external pad into consideration.In this paper, the constitutive relation of multilayered PTH is developed to establish the stress equation, and finite element analysis (FEA) is performed to locate the maximum stress and simulate the influence of the material properties. Finally, thermal cycle tests are conducted to verify the accuracy of the life prediction results. This model could be used in fatigue failure portable diagnosis and for life prediction of multilayered PCB.
Technical Library | 2021-03-04 15:16:27.0
Out-of-plane wrinkling has a significant influence on the mechanical performance of composite laminates. Numerical simulations were conducted to investigate the progressive failure behavior of fiber-reinforced composite laminates with out-of-plane wrinkle defects subjected to axial compression. To describe the material degradation, a three-dimensional elastoplastic damage model with four damage modes (i.e., fiber tensile failure, matrix failure, fiber kinking/splitting, and delamination) was developed based on the LaRC05 criterion. To improve the computational efficiency in searching for the fracture angle in the matrix failure analysis, a high-efficiency and robust modified algorithm that combines the golden section search method with an inverse interpolation based on an existing study is proposed.
Technical Library | 2021-11-03 16:36:36.0
Laser reflow soldering is an important technology in electronic components processing. In this paper, we presented a simple but efficient method to achieve reflow soldering process with gradient energy band created by just two parallel mirrors. The detailed influence of the variety of optical parameters on the soldering process has been analyzed by using the finite element method. And the modulation of the optical parameters on reflow soldering parameters also has been demonstrated. In our experiment, one HR mirror and one-mirror with transmissivity of 10% have been used to create a gradient energy band with an incident laser power of 50W. In summary, both the simulations and the experiments show that the typical reflow soldering profile has been acquired by the optical system. The high quality joints on both the front and rear surface of the capacitor can be acquired by just one surface radiation of the optical system.
Technical Library | 2021-12-02 01:44:00.0
With the advent of Industry 4.0, production processes have been endowed with intelligent cyber-physical systems generating massive amounts of streaming sensor data. Internet of Things technologies have enabled capturing, managing, and processing production data at a large scale in order to utilize this data as an asset for the optimization of production processes. In this work, we focus on the automatic detection of physical defects in the production of surfacemount devices. We show how to build a classification model based on random forests that efficiently detects defect products with a high degree of precision. In fact, the results of our preliminary experimental analysis indicate that our approach is able to correctly determine defects in a simulated production environment of surface-mount devices with a MCC score of 0.96. We investigate the feasibility of utilizing this approach in realistic settings. We believe that our approach will help to advance the production of surface-mount devices.
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